Texas Instruments LV32EVK01 Evaluation Kit LV32EVK01/NOPB LV32EVK01/NOPB Datenbogen
Produktcode
LV32EVK01/NOPB
DS92LV3241/3242 Evaluation Kit Users Manual Version 1.0
How to set up the Evaluation Kit:
The PCB routing for the serializer input pins (TxIN) have been laid out to accept
incoming LVCMOS signals from a 50-pin IDC connector. The serial interface between
the DS92LV3241 and the DS92LV3242 uses a standard RJ-45 connector and CAT-5/6
cable assembly (small CAT-6 cable provided). The PCB routing for the Rx output pins
(RxOUT) are accessed through a 50-pin IDC connector. Please follow these steps to
set up the evaluation kit for bench testing and performance measurements:
1) A two (2) meter CAT 6 connector
/
cable assembly has been included in the kit.
Connect one side of cable to the serializer board and the other side to the
deserializer board. This completes the LVDS interface connection.
deserializer board. This completes the LVDS interface connection.
2) Jumpers and switches have been configured at the factory; they should not require
any changes for immediate operation of the chipset. See text on Configuration
Settings for more details. From the transmitting test equipment, connect a flat cable
or fly wires (not supplied) to the Serializer board and connect another flat cable or fly
wires (not supplied) from the Deserializer board to the receiving test equipment.
Caution: The LVCMOS input levels should be within the specified range for optimal
performance, not to exceed the absolute maximum rating of -0.3V to (V
Settings for more details. From the transmitting test equipment, connect a flat cable
or fly wires (not supplied) to the Serializer board and connect another flat cable or fly
wires (not supplied) from the Deserializer board to the receiving test equipment.
Caution: The LVCMOS input levels should be within the specified range for optimal
performance, not to exceed the absolute maximum rating of -0.3V to (V
DD
+0.3V).
Note: For 50 ohm signal sources, add 50 ohm parallel termination resistors R1-R32
on the DS92LV3241 Serializer board and provide appropriate 3.3V LVCMOS input
signal levels into TxIN[32:0] and TxCLKIN.
Note: The Rx board may require the use of LVCMOS buffers to drive 50 ohm inputs
found in some test equipment.
on the DS92LV3241 Serializer board and provide appropriate 3.3V LVCMOS input
signal levels into TxIN[32:0] and TxCLKIN.
Note: The Rx board may require the use of LVCMOS buffers to drive 50 ohm inputs
found in some test equipment.
3) Power for the Tx and Rx boards must be supplied externally through Power Jack
(V
DD
). Grounds for both boards are connected through Power Jack (V
SS
) (see
section below).
Power Connection:
The serializer and deserializer boards must be powered by supplying power externally
through J7 (V
through J7 (V
DD
) and J8 (V
SS
) on the serializer Board and J6 (VDD) and J7 (VSS) on the
deserializer board. Note +4V is the absolute MAXIMUM voltage (not operating voltage)
that should ever be applied to the serializer (DS92LV3241) or deserializer
(DS92LV3242) VDD terminal. Damage to the device(s) can result if the voltage
maximum is exceeded.
that should ever be applied to the serializer (DS92LV3241) or deserializer
(DS92LV3242) VDD terminal. Damage to the device(s) can result if the voltage
maximum is exceeded.
National Semiconductor Corporation
Date: 9/28/2009
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