Texas Instruments DAC8164EVM Evaluation Module DAC8164EVM DAC8164EVM Datenbogen
Produktcode
DAC8164EVM
DAC Module
O
u
tp
u
t
B
u
ff
e
r
M
o
d
u
le
VCC
VSS
+3.3VA
VCC
GND
GND
VDD
DAC Out
4 CH
(J3A)
(J3B)
(J3B)
(JMP7)
(JMP17)
External
Reference
Module
VDD
A0/RST
A1/RSTSEL
A1/RSTSEL
SYNC
SCLK
LDAC
TP4
JMP8
TP2
VSS
V
REF
H
V
REF
L
+5VA
DIN
(J4A)
(J4B)
(J4B)
8 CH
EN
A0/
RST
A1/
RSTSEL
TP3
V
REF
H
JMP9
JMP3
JMP4
JMP5
JMP6
JMP10
VSS
(J2A)
(J2B)
(J2B)
(JMP18)
(JMP11)
(JMP12)
(JMP13)
(JMP14)
(JMP12)
(JMP13)
(JMP14)
JMP15
JMP16
+5VA
+3.3VA
+3.3VA
TP7
2
PCB Design
2.1
PCB Layout
PCB Design
www.ti.com
Figure 1. DAC8164/65EVM Block Diagram
This section describes the layout design of the PCB, the physical and mechanical characteristics of the
EVM. The list of components used on this evaluation module is also included in this section.
EVM. The list of components used on this evaluation module is also included in this section.
The DAC8164/65EVM is designed to preserve the performance quality of the DAC, device under test, as
specified in the data sheet. Carefully analyzing the EVM’s physical restrictions and the given or known
elements that contribute to the EVM’s performance degradation is the key to a successful design
implementation. These obvious attributes that diminish the performance of the EVM can be easily
addressed during the schematic design phase, by properly selecting the right components and building the
circuit correctly. The circuit must include adequate bypassing, identifying and managing the analog and
digital signals, and understanding the components mechanical attributes.
specified in the data sheet. Carefully analyzing the EVM’s physical restrictions and the given or known
elements that contribute to the EVM’s performance degradation is the key to a successful design
implementation. These obvious attributes that diminish the performance of the EVM can be easily
addressed during the schematic design phase, by properly selecting the right components and building the
circuit correctly. The circuit must include adequate bypassing, identifying and managing the analog and
digital signals, and understanding the components mechanical attributes.
The obscure part of the design is the layout process in which limited knowledge and inexperience can
easily present a problem. The main concern is primarily with component placement and the proper routing
of signals. The bypass capacitors must be placed as close as possible to the pins, and the analog and
digital signals must be properly separated from each other. The power and ground plane is important and
must be carefully considered in the layout process. A solid plane is ideally preferred but sometimes
impractical. Therefore, when solid planes are not possible, a split plane does the job as well. When
considering a split plane design, analyze the component placement and carefully split the board into its
analog and digital sections starting from the device under test. The ground plane plays an important role in
controlling the noise and other effects that otherwise contribute to the error of the DAC output. To ensure
that the return currents are handled properly, route the appropriate signals only in their respective
sections, meaning that the analog traces must only lay directly above or below the analog section and the
digital traces in the digital section. Minimize the length of the traces but use the biggest possible trace
width allowable in the design. These design practices can be seen in the following illustrations.
easily present a problem. The main concern is primarily with component placement and the proper routing
of signals. The bypass capacitors must be placed as close as possible to the pins, and the analog and
digital signals must be properly separated from each other. The power and ground plane is important and
must be carefully considered in the layout process. A solid plane is ideally preferred but sometimes
impractical. Therefore, when solid planes are not possible, a split plane does the job as well. When
considering a split plane design, analyze the component placement and carefully split the board into its
analog and digital sections starting from the device under test. The ground plane plays an important role in
controlling the noise and other effects that otherwise contribute to the error of the DAC output. To ensure
that the return currents are handled properly, route the appropriate signals only in their respective
sections, meaning that the analog traces must only lay directly above or below the analog section and the
digital traces in the digital section. Minimize the length of the traces but use the biggest possible trace
width allowable in the design. These design practices can be seen in the following illustrations.
The DAC8164/65EVM board is constructed on a four-layer, printed-circuit board using a copper-clad FR-4
laminate material. The printed-circuit board has a dimension of 43,1800 mm (1.7000 inch)
laminate material. The printed-circuit board has a dimension of 43,1800 mm (1.7000 inch)
×
82,5500 mm
(3.2500 inch), and the board thickness is 1,5748 mm (0.062 inch).
through
show the
individual artwork layers.
4
DAC8164/65 Evaluation Module
SLAU256 – August 2008