Texas Instruments Evaluation Module for TPS54821 TPS54821EVM-049 TPS54821EVM-049 Datenbogen
Produktcode
TPS54821EVM-049
Test Setup and Results
1.3.5
Input Voltage Rails
The EVM is designed to accommodate different input voltage levels for the power stage and control logic.
During normal operation, the PVIN and VIN inputs are connected using a jumper across JP1. The single
input voltage is supplied at J1. If desired, these two input voltage rails may be separated by removing the
jumper across JP1. Two input voltages must then be provided at both J1 and J2.
During normal operation, the PVIN and VIN inputs are connected using a jumper across JP1. The single
input voltage is supplied at J1. If desired, these two input voltage rails may be separated by removing the
jumper across JP1. Two input voltages must then be provided at both J1 and J2.
2
Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54821EVM-049 evaluation
module. The section also includes test results typical for the evaluation module and covers efficiency,
output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
module. The section also includes test results typical for the evaluation module and covers efficiency,
output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1
Input/Output Connections
The TPS54821EVM-049 is provided with input/output connectors and test points as shown in
. A
power supply capable of supplying 4 A must be connected to J1 through a pair of 20 AWG wires. The
jumper across JP1 must be in place. See
jumper across JP1 must be in place. See
for split-input voltage rail operation. The load must
be connected to J4 through a pair of 20 AWG wires. The maximum load current capability must be 8 A.
Wire lengths must be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor
the V
Wire lengths must be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor
the V
IN
input voltages with TP2 providing a convenient ground reference. TP9 is used to monitor the output
voltage with TP10 as the ground reference.
Table 4. EVM Connectors and Test Points
Reference Designator
Function
J1
PVIN input voltage connector. (See
for V
IN
range.)
J2
VIN input voltage connector. Not normally used.
J3
2-pin header for tracking voltage input and ground
J4
V
OUT
, 3.3 V at 8 A maximum
J5
2-pin header for tracking output and ground
JP1
PVIN to VIN jumper. Normally closed to tie VIN to PVIN for common rail voltage operation.
JP2
2-pin header for enable. Connect EN to ground to disable, open to enable.
TP1
PVIN test point at PVIN connector
TP2
GND test point at PVIN connector
TP3
VIN test point at VIN connector
TP4
GND test point at VIN connector
TP5
Test point provided to connect external voltage source for PWRGD pullup.
TP6
PWRGD test point
TP7
PH test point
TP8
Test point between voltage divider network and output. Used for loop response measurements.
TP9
Output voltage test point at VOUT connector
TP10
GND test point at VOUT connector
4
TPS54821EVM-049, 8-A, SWIFT
™
Regulator
—
Evaluation Module
SLVU479
–
October 2011
Copyright
©
2011, Texas Instruments Incorporated