Texas Instruments MSP430F55xx 64-Pin Target board only MSP-TS430RGC64USB MSP-TS430RGC64USB Datenbogen
Produktcode
MSP-TS430RGC64USB
1
3
5
7
9
11
13
2
4
6
8
10
12
14
TEST/SBWTCK
MSP430Fxxx
RST/NMI/SBWTDIO
TDO/TDI
TCK
GND
JTAG
R1
47 kΩ
See Note B
VCC TOOL
VCC TARGET
C1
2.2 nF
See Note B
J1 (see Note A)
J2 (see Note A)
Important to connect
V /AV /DV
CC
CC
CC
V /AV /DV
SS
SS
SS
V
CC
C2
10 µF
C3
0.1 µF
0.1 µF
Signal Connections for In-System Programming and Debugging
A
Make connection J1 if a local target power supply is used, or make connection J2 if the target is powered from the
debug or programming adapter.
debug or programming adapter.
B
The device RST/NMI/SBWTDIO pin is used in 2-wire mode for bidirectional communication with the device during
JTAG access, and any capacitance that is attached to this signal may affect the ability to establish a connection with
the device. The upper limit for C1 is 2.2 nF when using current TI tools.
JTAG access, and any capacitance that is attached to this signal may affect the ability to establish a connection with
the device. The upper limit for C1 is 2.2 nF when using current TI tools.
Figure 2-3. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire) Used by MSP430F5xx and
MSP430F6xx Devices
23
SLAU278Q – May 2009 – Revised February 2014
Design Considerations for In-Circuit Programming
Copyright © 2009–2014, Texas Instruments Incorporated