Texas Instruments DP130 Single-Source Evaluation Module DP130SSEVM DP130SSEVM Datenbogen
Produktcode
DP130SSEVM
DP++ MultiMode Source Side Re-driver; GPU w/ Separate DDC & AUX Outputs;
AUX & DDC Internal Mux Utilized; AUX Channel Monitored for Link Training
AUX
HPD
GPU
MAIN[3:0]
4 diff
DDC
R
DDC
R
DDC
3.3V
I
2
C
R
I2C
R
I2C
3.3V
AUXSRC-
AUXSRC+
AUXSRC+
DDC
D
P
C
o
n
n
e
c
to
r
IN[3:0]
4 diff
OUT[3:0]
HPD_SRC
HPD_SNK
AUXSNK-
AUXSNK+
CAD_SNK
SN75DP130
1M
100kW
100kW
3.3V
100kWresistors shall be placed on the AUXSNK side to
ensure proper device internal channel biasing, and to
ensure the sink device identifies the source during power
down conditions.
ensure the sink device identifies the source during power
down conditions.
SCL_CTL
SDA_CTL
SDA_CTL
The use of R
DDC
is optional. The SN75DP130
integrates 60kWpullups and a cable adapter
should include 2kWpullup for each line. If it is
uncertain if the cable adapter includes 2kW
pullup resistance, use 10kWfor R
DDC
.
Optional I
2
C interface may be used to
fully configure output signal
conditioning and EQ settings. 10kW
conditioning and EQ settings. 10kW
resistors are recommended for R
I2C
.
DP++ MultiMode Source Side Re-driver; GPU w/ Unified DDC & AUX Outputs;
AUX & DDC Internal Mux Utilized; AUX Channel Monitored for Link Training
HPD
AUXSRC-
AUXSRC+
AUXSRC+
DDC
GPU
MAIN[3:0]
D
P
C
o
n
n
e
c
to
r
IN[3:0]
4 diff
4 diff
OUT[3:0]
HPD_SRC
HPD_SNK
AUXSNK-
AUXSNK+
CAD_SNK
SN75DP130
1M
Optional I
2
C interface may be used to fully
configure output signal conditioning and
EQ settings. 10kW resistors are
EQ settings. 10kW resistors are
recommended for R
I2C
.
100kW
100kW
3.3V
100kWresistors shall be placed on the AUXSNK side to
ensure proper device internal channel biasing, and to
ensure the sink device identifies the source during power
down conditions.
ensure the sink device identifies the source during power
down conditions.
SCL_CTL
SDA_CTL
SDA_CTL
I
2
C
R
I2C
R
I2C
3.3V
AUX
DDC
SLLSE57D – APRIL 2011 – REVISED JULY 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
during storage or handling to prevent electrostatic damage to the MOS gates.
TYPICAL IMPLEMENTATIONS
The configuration shown in
supports a GPU with unified AUX/DDC interfaces. This circuit provides back
current protection into the GPU AUX, HPD, and CAD inputs.
Figure 1. DP++ Dual-Mode in a Unified AUX/DDC Configuration
The configuration shown in
supports a GPU with separate DDC and AUX interfaces, and overcomes the
need for an external AUX to DDC switch. This circuit provides back current protection into the GPU AUX, HPD,
and CAD inputs.
and CAD inputs.
Figure 2. DP++ Dual-Mode in a Split AUX and DDC Configuration
2
Copyright © 2011–2013, Texas Instruments Incorporated
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