Texas Instruments DP130 Single-Source Evaluation Module DP130SSEVM DP130SSEVM Datenbogen
Produktcode
DP130SSEVM
SLLSE57D – APRIL 2011 – REVISED JULY 2013
ORDERING INFORMATION
(1)
PART NUMBER
PART MARKING
PACKAGE
SN75DP130DSRGZR
DP130DS
48-pin QFN reel
SN75DP130SSRGZR
DP130SS
48-pin QFN reel
SN75DP130DSRGZT
DP130DS
48-pin QFN small quantity tape
SN75DP130SSRGZT
DP130SS
48-pin QFN small quantity tape
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at
web site at
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
V
CC
–0.3 to 4.0
V
Supply voltage
range
range
V
DDD
, V
DDD_DREG
–0.3 to 1.3
V
Main link I/O differential voltage
–0.3 to 1.3
V
Voltage range
HPD_SNK
–0.3 to 5.5
V
All other terminals
–0.3 to 4
V
Storage temperature T
S
–65 to 150
°C
Main Link I/O, AUX_SNK, HPD_SNK, CAD_SNK
±2
kV
Human Body
Electrostatic
Model
(2)
All Other Terminals
±2
kV
discharge
Charged-device model
(3)
±500
V
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
Tested in accordance with JEDEC Standard 22, Test Method A114-B
(3)
Tested in accordance with JEDEC Standard 22, Test Method C101-A
THERMAL INFORMATION
SN75DP130
THERMAL METRIC
(1)
UNITS
QFN (48) PINS
θ
JA
Junction-to-ambient thermal resistance
35.1
θ
JCtop
Junction-to-case (top) thermal resistance
21.5
θ
JB
Junction-to-board thermal resistance
11.7
°C/W
ψ
JT
Junction-to-top characterization parameter, high-k board
1.2
ψ
JB
Junction-to-board characterization parameter, high-k board
11.9
θ
JCbot
Junction-to-case (bottom) thermal resistance
6.7
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report,
Copyright © 2011–2013, Texas Instruments Incorporated
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