Texas Instruments SMA breakout daughterboard for TLK10034 TLK10034SMAEVM TLK10034SMAEVM Datenbogen
Produktcode
TLK10034SMAEVM
JTAG
The USB Dongle implementing TI’s TUSB3210 microcontroller is the preferred method of controlling the
TLK10034 register stack and is the only way to interface the GUI with the board. When the USB Dongle is
connected to the EVM board through the Samtec MEC1 connector, the MDIO signals are at 3.3-V levels
because the TUSB3210 is a 3.3-V device with open drain architecture. The EVM board has TI’s
TXS0108EPWR bidirectional level shifter to convert the MDIO signals to the 1.5/8V levels required by the
TLK10034. Ensure that a shunt is placed on the 3.3-V and MDIO_LS pins of JMP30 on the EVM board to
ensure that the appropriate 3.3-V voltage is used on the level shifter and pull-up resistors. The 2.5-V
voltage option is supplied for TI use only with a legacy MDIO Controller.
TLK10034 register stack and is the only way to interface the GUI with the board. When the USB Dongle is
connected to the EVM board through the Samtec MEC1 connector, the MDIO signals are at 3.3-V levels
because the TUSB3210 is a 3.3-V device with open drain architecture. The EVM board has TI’s
TXS0108EPWR bidirectional level shifter to convert the MDIO signals to the 1.5/8V levels required by the
TLK10034. Ensure that a shunt is placed on the 3.3-V and MDIO_LS pins of JMP30 on the EVM board to
ensure that the appropriate 3.3-V voltage is used on the level shifter and pull-up resistors. The 2.5-V
voltage option is supplied for TI use only with a legacy MDIO Controller.
MDIO signals can be routed to either of the low-speed board-to-board connectors for use with the
TLK10002 EVM FPGA Daughterboard or other interface boards that may require MDIO communication on
the same MDIO bus as the TLK10034. This feature is not currently supported but is planned in a future
revision. Control over the relays used to route the MDIO bus without creating stub branches is done using
switch SW5, or through the TCA6424 I
TLK10002 EVM FPGA Daughterboard or other interface boards that may require MDIO communication on
the same MDIO bus as the TLK10034. This feature is not currently supported but is planned in a future
revision. Control over the relays used to route the MDIO bus without creating stub branches is done using
switch SW5, or through the TCA6424 I
2
C interface and GUI.
The MDIO PRTAD[4:2] is defaulted to 3b’000. If this value is changed in hardware, it must also be
changed in the GUI so that proper MDIO communication is possible.
changed in the GUI so that proper MDIO communication is possible.
8
JTAG
The EVM also provides a separate connector to support the full five-pin JTAG interface of the TLK10034
with onboard level shifters to be compatible with most standard JTAG control interfaces used for
manufacturing tests. The 3.3-V (header) side of the level shifter is connected to the header and the 1.5/8V
side of the level shifter is connected to the TLK10034. If the level shifter is not needed, providing an
external voltage of the appropriate signal level between pins 2 and 3 of JMP33 allows the signals to pass
to the TLK10034 correctly.
with onboard level shifters to be compatible with most standard JTAG control interfaces used for
manufacturing tests. The 3.3-V (header) side of the level shifter is connected to the header and the 1.5/8V
side of the level shifter is connected to the TLK10034. If the level shifter is not needed, providing an
external voltage of the appropriate signal level between pins 2 and 3 of JMP33 allows the signals to pass
to the TLK10034 correctly.
9
Reset
The EVM comes configured for manual reset operations using the pushbutton reset switch (SW1). When
SW1 is pressed, the TLK10034 device RESET pin (RST_N) goes LOW and the entire TLK10034 device is
reinitialized. A TI TPS3125J18 ultra-low voltage processor supervisory circuit controls the reset line.
During power-on, RESET pin of U12 is asserted when the supply voltage becomes higher than 0.75 V.
Thereafter, the supply voltage supervisor monitors the voltage and keeps RESET output active as long as
the voltage remains below the threshold voltage (V
SW1 is pressed, the TLK10034 device RESET pin (RST_N) goes LOW and the entire TLK10034 device is
reinitialized. A TI TPS3125J18 ultra-low voltage processor supervisory circuit controls the reset line.
During power-on, RESET pin of U12 is asserted when the supply voltage becomes higher than 0.75 V.
Thereafter, the supply voltage supervisor monitors the voltage and keeps RESET output active as long as
the voltage remains below the threshold voltage (V
IT
). An internal timer delays the return of the output to
the inactive state (high) to ensure proper system reset. The delay time, t
d
= 180 ms, starts after the
voltage has risen above the threshold voltage (V
IT
).
A manual reset input to the supervisory circuit, MR, accepts the input from the pushbutton switch SW1. A
low level at MR causes RESET to become active, thus resetting the TLK10034 device whenever the
pushbutton RESET is pressed. By placing a jumper on JMP23, the manual reset (MR) is tied hard to
ground causing the TLK10034 to be held in a constant state of reset without the need to continually hold
the Reset Pushbutton, SW1. The supervisory circuit releases the reset line to a HIGH 180 ms (t
low level at MR causes RESET to become active, thus resetting the TLK10034 device whenever the
pushbutton RESET is pressed. By placing a jumper on JMP23, the manual reset (MR) is tied hard to
ground causing the TLK10034 to be held in a constant state of reset without the need to continually hold
the Reset Pushbutton, SW1. The supervisory circuit releases the reset line to a HIGH 180 ms (t
d
) from the
time the MR line becomes greater than the threshold voltage (V
IT
).
NOTE:
Issue all RESET commands through the GUI via the TCA6424 I
2
C-to-GPIO device
connected to the signals to keep the GUI setting and the device settings synchronized during
evaluation. When the software Main Board Reset buttons are pressed, the GUI adjusts its
memory settings of the various registers to match the new values the devices reflect after the
hardware RESET is performed. If the buttons are pressed on the board, the GUI does not
reflect the devices' true status and may result in erroneous results during testing because the
device is not configured according to the GUI’s displayed results.
evaluation. When the software Main Board Reset buttons are pressed, the GUI adjusts its
memory settings of the various registers to match the new values the devices reflect after the
hardware RESET is performed. If the buttons are pressed on the board, the GUI does not
reflect the devices' true status and may result in erroneous results during testing because the
device is not configured according to the GUI’s displayed results.
8
TLK10034 Quad-Channel XAUI/10GBASE-KR Transceiver Evaluation
SLLU168 – August 2012
Module (EVM)
Copyright © 2012, Texas Instruments Incorporated