Texas Instruments 16-channel LVDS Receiver Evaluation Module SN65LVDS386EVM SN65LVDS386EVM Datenbogen

SN65LVDS387EVM Operation

4-2

The SN65LVDS387EVM is ready to be used as shipped. When connected to
the test instrumentation and 3.3-Vdc power (as described in section 3),
performance can be tested and observed. All I/O connections are made using
standard BergSticks



 that allow fast and easy connections. These also allow

direct connections to oscilloscope probes. BergSticks



 are also used for the

enable/disable jumper posts to provide easy connection to external equipment
if device response to enable/disable is required. The jumper shorts can be
manually placed in either the V

CC

 position (enabled) or the GND position

(disabled), or the jumper post can be removed to allow connection to external
equipment. Note that there is no 50-

Ω

 termination onboard for the

enable/disable pins.

Basic tests of the SN65LVDS387 driver will consist of applying an LVTTL sig-
nal pattern to the P1/P2 input connector and monitoring the output of the driver.
When tested as a stand-alone device, 100-

Ω

 termination resistors can be add-

ed to the scope probe, or individual 100-

Ω

 termination resistors can be

installed on the board (backside of the SN65LVDS387EVM) at R1 through
R16. The scope termination is recommended for high-signaling rates to elimi-
nate the stub effects caused by the PWB traces running to the P3 connector.

The input pins on connectors P1 and P2 stagger the input and ground pins row
to row. This is done to minimize channel-to-channel crosstalk and interference
between input channels. If an LVDS channel is not responding, check to make
sure the input connection has not been inverted.