Texas Instruments XIO2213B Evaluation Module / Reference Design XIO2213BEVM XIO2213BEVM Datenbogen
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XIO2213BEVM
SCPS210F – OCTOBER 2008 – REVISED MAY 2013
6.5
Serial-Bus Data Register
The serial-bus data register is used to read and write data on the serial-bus interface. When writing data
to the serial bus, this register must be written before writing to the serial-bus address register to initiate the
cycle. When reading data from the serial bus, this register will contain the data read after the REQBUSY
(bit 5 serial-bus control register) bit is cleared. This register is an alias for the serial-bus data register in
the PCI header. This register shall only be reset by FRST.
to the serial bus, this register must be written before writing to the serial-bus address register to initiate the
cycle. When reading data from the serial bus, this register will contain the data read after the REQBUSY
(bit 5 serial-bus control register) bit is cleared. This register is an alias for the serial-bus data register in
the PCI header. This register shall only be reset by FRST.
Device control memory window register offset:
44h
Register type:
Read/Write
Default value:
00h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
1
6.6
Serial-Bus Word Address Register
The value written to the serial-bus index register represents the byte address of the byte being read or
written from the serial-bus device. The serial-bus index register must be written before the before initiating
a serial bus cycle by writing to the serial-bus slave address register. This register is an alias for the serial-
bus index register in the PCI header. This register shall only be reset by FRST.
written from the serial-bus device. The serial-bus index register must be written before the before initiating
a serial bus cycle by writing to the serial-bus slave address register. This register is an alias for the serial-
bus index register in the PCI header. This register shall only be reset by FRST.
Device control memory window register offset:
45h
Register type:
Read/Write
Default value:
00h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0
6.7
Serial-Bus Slave Address Register
The serial-bus slave address register is used to indicate the address of the device being targeted by the
serial-bus cycle. This register also indicates if the cycle will be a read or a write cycle. Writing to this
register initiates the cycle on the serial interface. This register is an alias for the serial-bus slave address
register in the PCI header.
serial-bus cycle. This register also indicates if the cycle will be a read or a write cycle. Writing to this
register initiates the cycle on the serial interface. This register is an alias for the serial-bus slave address
register in the PCI header.
Device control memory window register offset:
46h
Register type:
Read/Write
Default value:
00h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0
Table 6-4. Serial-Bus Slave Address Register Descriptions
BIT
FIELD NAME
ACCESS
DESCRIPTION
7:1
(1)
SLAVE_ADDR
RW
Serial-bus slave address. This 7-bit field is the slave address for a serial-bus read or write
transaction. The default value for this field is 000 0000b.
transaction. The default value for this field is 000 0000b.
0
(1)
RW_CMD
RW
Read/write command. This bit determines if the serial-bus cycle is a read or a write cycle.
0 = A single-byte write is requested (default) .
1 = A single-byte read is requested.
1 = A single-byte read is requested.
(1)
These bits shall only be reset by a fundamental reset (FRST). FRST is asserted (low) whenever PERST or GRST is asserted.
112
Memory-Mapped TI Proprietary Register Space
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