Texas Instruments XIO2213B Evaluation Module / Reference Design XIO2213BEVM XIO2213BEVM Datenbogen
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XIO2213BEVM
SCPS210F – OCTOBER 2008 – REVISED MAY 2013
7.13 Power Management Capabilities Pointer Register
The power management capabilities pointer register provides a pointer into the PCI configuration header
where the power-management register block resides. The OHCI controller configuration header double
words at offsets 44h and 48h provide the power-management registers. This register is read only and
returns 44h when read.
where the power-management register block resides. The OHCI controller configuration header double
words at offsets 44h and 48h provide the power-management registers. This register is read only and
returns 44h when read.
PCI register offset:
34h
Register type:
Read only
Default value:
44h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
1
0
0
0
1
0
0
7.14 Interrupt Line and Interrupt Pin Registers
The interrupt line and interrupt pin registers communicate interrupt line routing information. See
for a complete description of the register contents.
PCI register offset:
3Ch
Register type:
Read/Write
Default value:
01FFh
BIT NUMBER
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
Table 7-10. Interrupt Line and Interrupt Pin Registers Description
BIT
FIELD NAME
TYPE
DESCRIPTION
15-8
INTR_PIN
R
Interrupt pin. This field returns 01h when read, indicating that the 1394 OHCI core signals
interrupts on the INTA terminal.
interrupts on the INTA terminal.
7-0
INTR_LINE
RW
Interrupt line. This field is programmed by the system and indicates to software which interrupt
line the OHCI controller INTA is connected to. The default value for this field is all FFh, indicating
that an interrupt line has not yet been assigned to the function.
line the OHCI controller INTA is connected to. The default value for this field is all FFh, indicating
that an interrupt line has not yet been assigned to the function.
122
1394 OHCI PCI Configuration Space
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