Texas Instruments MuxIt-EVM Evaluation Module MUXIT-EVM MUXIT-EVM Datenbogen

Produktcode
MUXIT-EVM
Seite von 46
What is MuxIt?
1-2
1.1
What is MuxIt?
MuxIt is a family of general-purpose building blocks designed to serialize and
deserialize parallel data. This family includes three types of devices support-
ing simplex communications: A PLL frequency multiplier (SN65LVDS150),
a serializer-transmitter (SN65LVDS151), and a receiver-deserializer
(SN65LVDS152).
The key feature of MuxIt is that it is general-purpose, providing flexibility while
maintaining throughput capability. The MuxIt EVM demonstrates this flexibility
by allowing the user to select and evaluate different operating modes,
bandwidths, and interconnecting configurations. The MuxIt EVM also allows
the user to become familiar with the MuxIt devices, to understand how they
operate, and to understand how to design a serializer/deserializer (serdes)
interface using them. Design guidelines for a MuxIt interface are also provided
in SLLA093, 
The Muxit Data Transmission System Applications, Examples,
And Design Guidelines.
The MuxIt operations are referred to as basic, cascade, and parallel. This EVM
is designed so that the three different operations may be readily tested. The
basic operation is used when the input data into a single serializer-transmitter
has a bit width between 4 and 10. This operation utilizes an LVDS link,
comprised of two LVDS pairs, for communication between the serializer and
the deserializer. One LVDS pair is the clock and the other pair is the serialized
data. Like the basic operation, the cascade operation uses an LVDS link made
up of only two LVDS pairs. The cascade capability of MuxIt allows wider
parallel data to be transmitted across the LVDS link. Larger width input data
that has a higher throughput requirement can be serialized using multiple
LVDS data pairs in parallel to transmit data. The parallel input data is equally
divided between available serializers. In this parallel operation, the LVDS link
consists of multiple LVDS data pairs along with the single LVDS clock pair.