Texas Instruments On-Off Keying Coax Modem Transceiver Evalulation Module SN65HVD62EVM SN65HVD62EVM Datenbogen
Produktcode
SN65HVD62EVM
EVM Description
The various EVM components and their functions are described in
Table 1. SN65HVD62EVM Description
Label
Description
U1, U2
SN65HVD62 AISG Device
TP5, TP13
Test point to access SYNCOUT pin of U1 and U2, respectively
JU15, JU16
Jumpers to pull-up SYNCOUT to VCC for U1, U2 respectively.
Default: these jumpers are shorted.
Default: these jumpers are shorted.
R1, R7
1k
Ω
pull-up on SYNCOUT pin for U1, U2 respectively
TP6, TP14
Test point to access TXIN pin of U1, U2 respectively
TP7, TP15
Test point to access RXOUT pin of U1, U2 respectively
TP8, TP16
Test point to access DIR pin of U1, U2 respectively
JU2, JU8
Jumper provision for connecting DIRSET2 pin to either VL or GND for U1, U2 respectively.
By default, pins 1 and 2 of these jumpers are shorted. See
By default, pins 1 and 2 of these jumpers are shorted. See
for data rate control settings.
JU3, JU9
Jumper provision for connecting DIRSET1 pin to either VL or GND for U1, U2 respectively.
By default, pins 2 and 3 of these jumpers are shorted. See
By default, pins 2 and 3 of these jumpers are shorted. See
for data rate control settings.
R3, R9
10k
Ω
resistor to ground from RES pin of U1, U2 respectively
JU4, JU10
Jumper option for selecting between a fixed 4.1k
Ω
- 10k
Ω
voltage divider from BIAS pin to RES pin or a variable
potentiometer to 10k
Ω
voltage divider between these two pins for U1, U2 respectively.
By default, pins 1 and 2 of these jumpers are shorted to provide a fixed 4.1k
Ω
-10k
Ω
voltage divider output to RES
pin, that is, 1.064V.
VR1, VR2
Potentiometer to provide variable voltage to RES pin if JU4, JU10 pins 2 and 3 are shorted for U1, U2 respectively
C5, C14
1µF capacitor to ground for BIAS pin of U1, U2 respectively
R4, R10
50
Ω
resistor between TXOUT and RXIN pins of U1, U2 respectively
C6, C15
470pF filter capacitor to ground at TXOUT of U1, U2 respectively
L1, L2
220nF AC coupling cap between RXIN and coax for U1, U2 respectively
C7, R5, C16, R11
Uninstalled components
TP17, TP18
Test point to access TXOUT pin of U1, U2 respectively
JU5, JU11
Jumper option to provide crystal clock or external clock on XTAL1 pin for U1, U2 respectively.
By default, short pins 1 and 2 of these jumpers to provide clock from the on-board crystal.
By default, short pins 1 and 2 of these jumpers to provide clock from the on-board crystal.
J2, J4
SMA connectors using which external clock can be applied on XTAL1 pins of U1, U2 respectively if pins 2 and 3 of
jumpers JU5 and JU11 are shorted
jumpers JU5 and JU11 are shorted
R6, R12
Series 10k
Ω
resistor through which external clock will be applied on XTAL1 pins for U1, U2 respectively
Y1, Y2
On board crystal clock source for U1, U2 respectively
C8, C17
39pF capacitor to ground from on-board crystal pin connected to XTAL1 of U1, U2 respectively
C9, C18
39pF capacitor to ground from on-board crystal pin connected to XTAL2 of U1, U2 respectively
JU6, JU12
Jumper option to connect XTAL2 pin to ground for U1, U2 respectively. By default, when using on-board crystal clock
source, these jumpers are open. If external clock source is used through J2, J4, then these jumpers must be shorted.
source, these jumpers are open. If external clock source is used through J2, J4, then these jumpers must be shorted.
TP1, TP9
Test point to access VCC pin of U1, U2 respectively
TP3, TP11
Test point to access VL pin of U1, U2 respectively
JU1, JU7
Jumper option to short VCC and VL supplies for U1, U2 respectively.
By default, jumpers are shorted to allow use of a single supply source per device.
By default, jumpers are shorted to allow use of a single supply source per device.
C3, C12
0.1uF decoupling capacitor on VCC pin of U1, U2 respectively
C4, C13
0.1uF decoupling capacitor on VL pin of U1, U2 respectively
C1, C10
10uF decoupling capacitor on VCC supply of U1, U2 respectively
C2, C11
10uF decoupling capacitor on VL supply of U1, U2 respectively
JU13
Jumper option to connect coax interface of U1 and U2.
By default, this jumper is shorted to allow the system evaluation of two devices without the need for an external
cable.
By default, this jumper is shorted to allow the system evaluation of two devices without the need for an external
cable.
TP2, TP4, TP19, TP20,
Test points to access GND pins of U1
TP21, TP22
TP10, TP12, TP23, TP24,
Test points to access GND pins of U2
TP25, TP26
E1, E2
Jumper option to short VCC supply of U1 to VCC supply of U2. Both jumpers should be shorted to exercise this option.
By default, these jumpers are shorted.
By default, these jumpers are shorted.
E3, E4, JU14
Jumper option to short GND planes of devices U1 and U2.
By default, these jumpers are shorted.
By default, these jumpers are shorted.
5
SLLU152 – December 2012
SN65HVD62 AISG On-Off Keying Modem Evaluation Module (EVM)
Copyright © 2012, Texas Instruments Incorporated