Texas Instruments TAS2521 Evaluation Module TAS2521EVM TAS2521EVM Datenbogen
Produktcode
TAS2521EVM
T0145-11
WCLK
BCLK
DIN
t (WS)
h
t (BCLK)
H
t (DI)
S
t (BCLK)
L
t (DI)
h
t (WS)
S
t
r
t
f
SLAS687A – FEBRUARY 2013 – REVISED FEBRUARY 2013
3.5.2
I
2
S/LJF/RJF Timing in Slave Mode
All specifications at 25°C, DVDD = 1.8 V
Note: All timing specifications are measured at characterization but not tested at final test.
IOVDD = 1.8 V
IOVDD = 3.3 V
PARAMETER
UNIT
MIN
MAX
MIN
MAX
t
H
(BCLK)
BCLK high period
35
35
ns
t
L
(BCLK)
BCLK low period
35
35
ns
t
s
(WS)
WCLK setup
8
6
ns
t
h
(WS)
WCLK hold
8
6
ns
t
s
(DI)
DIN setup
8
6
ns
t
h
(DI)
DIN hold
8
6
ns
t
r
Rise time
4
4
ns
t
f
Fall time
4
4
ns
Figure 3-2. I
2
S/LJF/RJF Timing in Slave Mode
10
ELECTRICAL SPECIFICATIONS
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