Texas Instruments TPS54560 Step-Down DC-DC Converter Evaluation Module TPS54560EVM-515 TPS54560EVM-515 Datenbogen
Produktcode
TPS54560EVM-515
OUT(max)
(max)
IN(min)
OUT(max)
DS(on)
OUT(max)
L
V
D
x (V
- I
x R
VF) - VF
I
x R
=
+
+
SLVSBN0A – MARCH 2013 – REVISED MARCH 2014
Feature Description (continued)
8.3.3 Pulse Skip Eco-mode
The TPS54560 operates in a pulse skipping Eco-mode at light load currents to improve efficiency by reducing
switching and gate drive losses. If the output voltage is within regulation and the peak switch current at the end
of any switching cycle is below the pulse skipping current threshold, the device enters Eco-mode. The pulse
skipping current threshold is the peak switch current level corresponding to a nominal COMP voltage of 600 mV.
switching and gate drive losses. If the output voltage is within regulation and the peak switch current at the end
of any switching cycle is below the pulse skipping current threshold, the device enters Eco-mode. The pulse
skipping current threshold is the peak switch current level corresponding to a nominal COMP voltage of 600 mV.
When in Eco-mode, the COMP terminal voltage is clamped at 600 mV and the high side MOSFET is inhibited.
Since the device is not switching, the output voltage begins to decay. The voltage control loop responds to the
falling output voltage by increasing the COMP terminal voltage. The high side MOSFET is enabled and switching
resumes when the error amplifier lifts COMP above the pulse skipping threshold. The output voltage recovers to
the regulated value, and COMP eventually falls below the Eco-mode pulse skipping threshold at which time the
device again enters Eco-mode. The internal PLL remains operational when in Eco-mode. When operating at light
load currents in Eco-mode, the switching transitions occur synchronously with the external clock signal.
Since the device is not switching, the output voltage begins to decay. The voltage control loop responds to the
falling output voltage by increasing the COMP terminal voltage. The high side MOSFET is enabled and switching
resumes when the error amplifier lifts COMP above the pulse skipping threshold. The output voltage recovers to
the regulated value, and COMP eventually falls below the Eco-mode pulse skipping threshold at which time the
device again enters Eco-mode. The internal PLL remains operational when in Eco-mode. When operating at light
load currents in Eco-mode, the switching transitions occur synchronously with the external clock signal.
During Eco-mode operation, the TPS54560 senses and controls peak switch current, not the average load
current. Therefore the load current at which the device enters Eco-mode is dependent on the output inductor
value. The circuit in
current. Therefore the load current at which the device enters Eco-mode is dependent on the output inductor
value. The circuit in
enters Eco-mode at about 25.3 mA output current. As the load current approaches
zero, the device enters a pulse skip mode during which it draws only 146
μA input quiescent current.
8.3.4 Low Dropout Operation and Bootstrap Voltage (BOOT)
The TPS54560 provides an integrated bootstrap voltage regulator. A small capacitor between the BOOT and SW
terminals provides the gate drive voltage for the high side MOSFET. The BOOT capacitor is refreshed when the
high side MOSFET is off and the external low side diode conducts. The recommended value of the BOOT
capacitor is 0.1
terminals provides the gate drive voltage for the high side MOSFET. The BOOT capacitor is refreshed when the
high side MOSFET is off and the external low side diode conducts. The recommended value of the BOOT
capacitor is 0.1
μF. A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10 V or
higher is recommended for stable performance over temperature and voltage.
When operating with a low voltage difference from input to output, the high side MOSFET of the TPS54560 will
operate at 100% duty cycle as long as the BOOT to SW terminal voltage is greater than 2.1V. When the voltage
from BOOT to SW drops below 2.1V, the high side MOSFET is turned off and an integrated low side MOSFET
pulls SW low to recharge the BOOT capacitor. To reduce the losses of the small low side MOSFET at high
output voltages, it is disabled at 24 V output and re-enabled when the output reaches 21.5 V.
operate at 100% duty cycle as long as the BOOT to SW terminal voltage is greater than 2.1V. When the voltage
from BOOT to SW drops below 2.1V, the high side MOSFET is turned off and an integrated low side MOSFET
pulls SW low to recharge the BOOT capacitor. To reduce the losses of the small low side MOSFET at high
output voltages, it is disabled at 24 V output and re-enabled when the output reaches 21.5 V.
Since the gate drive current sourced from the BOOT capacitor is small, the high side MOSFET can remain on for
many switching cycles before the MOSFET is turned off to refresh the capacitor. Thus the effective duty cycle of
the switching regulator can be high, approaching 100%. The effective duty cycle of the converter during dropout
is mainly influenced by the voltage drops across the power MOSFET, the inductor resistance, the low side diode
voltage and the printed circuit board resistance.
many switching cycles before the MOSFET is turned off to refresh the capacitor. Thus the effective duty cycle of
the switching regulator can be high, approaching 100%. The effective duty cycle of the converter during dropout
is mainly influenced by the voltage drops across the power MOSFET, the inductor resistance, the low side diode
voltage and the printed circuit board resistance.
The start and stop voltage for a typical 5 V output application is shown in
where the Vin voltage is
plotted versus load current. The start voltage is defined as the input voltage needed to regulate the output within
1% of nominal. The stop voltage is defined as the input voltage at which the output drops by 5% or where
switching stops.
1% of nominal. The stop voltage is defined as the input voltage at which the output drops by 5% or where
switching stops.
During high duty cycle (low dropout) conditions, inductor current ripple increases when the BOOT capacitor is
being recharged resulting in an increase in output voltage ripple. Increased ripple occurs when the off time
required to recharge the BOOT capacitor is longer than the high side off time associated with cycle by cycle
PWM control.
being recharged resulting in an increase in output voltage ripple. Increased ripple occurs when the off time
required to recharge the BOOT capacitor is longer than the high side off time associated with cycle by cycle
PWM control.
At heavy loads, the minimum input voltage must be increased to insure a monotonic startup.
can be
used to calculate the minimum input voltage for this condition.
R
where
•
D
(max)
≥ 0.9
•
IB2SW = 100 µA
•
VF = Forward Drop of the Catch Diode
•
TSW = 1 / Fsw
•
VB2SW = VBOOT + VF
12
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