Texas Instruments IC MCU 16B MSP430F2370IRHAT VQFN-40 TID MSP430F2370IRHAT Datenbogen
Produktcode
MSP430F2370IRHAT
MSP430F23x0
SLAS518E
–
AUGUST 2006
–
REVISED AUGUST 2011
Memory Organization
Table 11. Memory Organization
MSP430F2330
MSP430F2350
MSP430F2370
Memory
Size
8KB Flash
16KB Flash
32KB
Main: interrupt vector
Flash
0xFFFF - 0xFFC0
0xFFFF - 0xFFC0
0xFFFF - 0xFFC0
Main: code memory
Flash
0xFFFF - 0xE000
0xFFFF - 0xC000
0xFFFF - 0x8000
Information memory
Size
256 Byte
256 Byte
256 Byte
Flash
0x10FF - 0x1000
0x10FF - 0x1000
0x10FF - 0x1000
Boot memory
Size
1KB
1KB
1KB
ROM
0x0FFF - 0x0C00
0x0FFF - 0x0C00
0x0FFF - 0x0C00
RAM
Size
1KB
2KB
2KB
0x5FF - 0x0200
0x9FF - 0x0200
0x09FF - 0x0200
Peripherals
16
–
bit
0x01FF - 0x0100
0x01FF - 0x0100
0x01FF - 0x0100
8
–
bit
0x00FF - 0x0010
0x00FF - 0x0010
0x00FF - 0x0010
8
–
bit SFR
0x000F - 0x0000
0x000F - 0x0000
0x000F - 0x0000
Bootstrap Loader (BSL)
The MSP430 bootstrap loader (BSL) enables users to program the flash memory or RAM using a UART serial
interface. Access to the MSP430 memory via the BSL is protected by user-defined password. For complete
description of the features of the BSL and its implementation, see the MSP430 Programming Via the Bootstrap
Loader User
interface. Access to the MSP430 memory via the BSL is protected by user-defined password. For complete
description of the features of the BSL and its implementation, see the MSP430 Programming Via the Bootstrap
Loader User
’
s Guide, literature number
Table 12. BSL Function Pins
BSL FUNCTION
YFF PACKAGE PINS
RHA PACKAGE PINS
Data transmit
C4 - P1.1
5 - P1.1
Data receive
C6 - P2.2
14 - P2.2
Flash Memory
The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The
CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
•
Flash memory has n segments of main memory and four segments of information memory (A to D) of
64 bytes each. Each segment in main memory is 512 bytes in size.
64 bytes each. Each segment in main memory is 512 bytes in size.
•
Segments 0 to n may be erased in one step, or each segment may be individually erased.
•
Segments A to D can be erased individually, or as a group with segments 0 to n.
Segments A to D are also called information memory.
Segments A to D are also called information memory.
•
Segment A contains calibration data. After reset, segment A is protected against programming and erasing. It
can be unlocked, but care should be taken not to erase this segment if the device-specific calibration data is
required.
can be unlocked, but care should be taken not to erase this segment if the device-specific calibration data is
required.
12
Copyright
©
2006
–
2011, Texas Instruments Incorporated