Texas Instruments IC MCU 16B MSP430F2418TPM LQFP-64 TID MSP430F2418TPM Datenbogen
Produktcode
MSP430F2418TPM
P5SEL.x
P5DIR.x
P5IN.x
Module X IN
Module X OUT
P5OUT.x
P5REN.x
P5.0/UCB1STE/UCA1CLK
P5.1/UCB1SIMO/UCB1SDA
P5.2/UCB1SOMI/UCB1SCL
P5.3/UCB1CLK/UCA1STE
P5.4/MCLK
P5.5/SMCLK
P5.6/ACLK
P5.7/TBOUTH/SVSOUT
P5.1/UCB1SIMO/UCB1SDA
P5.2/UCB1SOMI/UCB1SCL
P5.3/UCB1CLK/UCA1STE
P5.4/MCLK
P5.5/SMCLK
P5.6/ACLK
P5.7/TBOUTH/SVSOUT
Module
Direction
Direction
0: Input
1: Output
0: Input
1: Output
D
EN
DVSS
DVCC
Pad Logic
1
1
0
1
0
1
0
MSP430F261x
MSP430F241x
MSP430F241x
SLAS541K – JUNE 2007 – REVISED NOVEMBER 2012
Port P5 (P5.0 to P5.7), Input/Output With Schmitt Trigger
Table 20. Port P5 (P5.0 to P5.7) Pin Functions
CONTROL BITS / SIGNALS
(1)
PIN NAME (P5.x)
x
FUNCTION
P5DIR.x
P5SEL.x
P5.0 (I/O)
I: 0; O: 1
0
P5.0/UCB1STE/
0
UCA1CLK
UCB1STE/UCA1CLK
(2) (3)
X
1
P5.1 (I/O)
I: 0; O: 1
0
P5.1/UCB1SIMO/
1
UCB1SDA
UCB1SIMO/UCB1SDA
(2) (4)
X
1
P5.2 (I/O)
I: 0; O: 1
0
P5.2/UCB1SOMI/
2
UCB1SCL
UCB1SOMI/UCB1SCL
(2) (4)
X
1
P5.3 (I/O)
I: 0; O: 1
0
P5.3/UCB1CLK/
3
UCA1STE
UCB1CLK/UCA1STE
(2)
X
1
P5.0 (I/O)
I: 0; O: 1
0
P5.4/MCLK
4
MCLK
1
1
P5.1 (I/O)
I: 0; O: 1
0
P5.5/SMCLK
5
SMCLK
1
1
P5.2 (I/O)
I: 0; O: 1
0
P5.6/ACLK
6
ACLK
1
1
P5.7 (I/O)
I: 0; O: 1
0
P5.7/TBOUTH/SVSOUT
7
TBOUTH
0
1
SVSOUT
1
1
(1)
X = Don't care
(2)
The pin direction is controlled by the USCI module.
(3)
UCA1CLK function takes precedence over UCB1STE function. If the pin is required as UCA1CLK input or output USCI_A1/B1 will be
forced to 3-wire SPI mode if 4-wire SPI mode is selected.
forced to 3-wire SPI mode if 4-wire SPI mode is selected.
(4)
If the I2C functionality is selected, the output drives only the logical 0 to V
SS
level.
80
Copyright © 2007–2012, Texas Instruments Incorporated