Texas Instruments IC MCU 16B MSP430F235TPM LQFP-64 TID MSP430F235TPM Datenbogen
Produktcode
MSP430F235TPM
MSP430F23x
MSP430F24x(1)
MSP430F2410
SLAS547I – JUNE 2007 – REVISED DECEMBER 2012
Crystal Oscillator XT2
(1)
PARAMETER
TEST CONDITIONS
V
CC
MIN
TYP
MAX
UNIT
XT2 oscillator crystal frequency,
f
XT2
XT2Sx = 0
1.8 V to 3.6 V
0.4
1
MHz
mode 0
XT2 oscillator crystal frequency,
f
XT2
XT2Sx = 1
1.8 V to 3.6 V
1
4
MHz
mode 1
1.8 V to 2.2 V
2
10
XT2 oscillator crystal frequency,
f
XT2
XT2Sx = 2
2.2 V to 3.0 V
2
12
MHz
mode 2
3.0 V to 3.6 V
2
16
1.8 V to 2.2 V
0.4
10
XT2 oscillator logic-level square-wave
f
XT2
XT2Sx = 3
2.2 V to 3.0 V
0.4
12
MHz
input frequency
3.0 V to 3.6 V
0.4
16
XT2Sx = 0, f
XT2
= 1 MHz,
2700
C
L,eff
= 15 pF
Oscillation allowance (see
XT2Sx = 1, f
XT2
= 4 MHz,
OA
800
Ω
and
C
L,eff
= 15 pF
XT2Sx = 2, f
XT2
= 16 MHz,
300
C
L,eff
= 15 pF
Integrated effective load capacitance,
C
L,eff
See
(3)
1
pF
HF mode
(2)
Measured at P1.4/SMCLK,
40
50
60
f
XT2
= 10 MHz
Duty cycle
2.2 V, 3 V
%
Measured at P1.4/SMCLK,
40
50
60
f
XT2
= 16 MHz
f
Fault
Oscillator fault frequency, HF mode
(4)
XT2Sx = 3
(5)
2.2 V, 3 V
30
300
kHz
(1)
To improve EMI on the XT2 oscillator the following guidelines should be observed:
(a) Keep the trace between the device and the crystal as short as possible.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XT2IN and XT2OUT.
(d) Avoid running PCB traces underneath or adjacent to the XT2IN and XT2OUT pins.
(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XT2IN and XT2OUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive or resistive leakage between the oscillator pins.
(a) Keep the trace between the device and the crystal as short as possible.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XT2IN and XT2OUT.
(d) Avoid running PCB traces underneath or adjacent to the XT2IN and XT2OUT pins.
(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XT2IN and XT2OUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive or resistive leakage between the oscillator pins.
(2)
Includes parasitic bond and package capacitance (approximately 2 pF per pin). Because the PCB adds additional capacitance, it is
recommended to verify the correct load by measuring the ACLK frequency. For a correct setup, the effective load capacitance should
always match the specification of the used crystal.
recommended to verify the correct load by measuring the ACLK frequency. For a correct setup, the effective load capacitance should
always match the specification of the used crystal.
(3)
Requires external capacitors at both terminals. Values are specified by crystal manufacturers.
(4)
Frequencies below the MIN specification set the fault flag, frequencies above the MAX specification do not set the fault flag, and
frequencies in between might set the flag.
frequencies in between might set the flag.
(5)
Measured with logic-level input frequency, but also applies to operation with crystals.
Copyright © 2007–2012, Texas Instruments Incorporated
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