Texas Instruments DP130 Dual-Source Evaluation Module DP130DSEVM DP130DSEVM Datenbogen
Produktcode
DP130DSEVM
Shutdown
Mode
EN and RSTN high
Power up
Standby
Mode
EN or RSTN low
Active Mode
CAD=0
DP mode
CAD=1
TMDS
mode
D3 Power
Down Mode
enter D3
AUX cmd
(CAD=0)
Exit D3
AUX cmd
or CAD high
EN or RSTN low
EN or RSTN low
HPD_SNK low
for >t
T(HPD)
HPD_SNK high;
AUX link
training started
HPD_SNK low
for >t
T(HPD)
Output
Disable
Mode
invalid DPCD
register entry
DPCD register
corrected
any
stat
e
Squelch event
Squelch release
DP++ MultiMode Source Side Re-driver; AUX Channel AC Capacitors Short
Circuited in TMDS Mode by Internal FET; AUX Channel Monitored for Link Training
AUX
HPD
A
U
X
S
R
C
-
A
U
X
S
R
C
+
SCL_CTL
SDA_CTL
SDA_CTL
GPU
MAIN[3:0]
D
P
c
o
n
n
e
c
to
r
IN[3:0]
4 diff
4 diff
OUT[3:0]
HPD_SRC
HPD_SNK
CAD
A
U
X
S
N
K
-
A
U
X
S
N
K
+
CAD_SNK
SCL
SDA
SN75DP130
100kW
100kW
3.3V
CAD
DDC
CAD
1M
Option 1: CAD_OUT drives GPU;
protects back current to GPU.
protects back current to GPU.
Option 2: connect CAD signal
from board connector to the GPU.
from board connector to the GPU.
CAD_SRC
R
I2C
R
I2C
3.3V
I
2
C required to select this
configuration
Minimize Stub Line Length
I
2
C interface may be used to fully
configure output signal conditioning
and EQ settings. 10kW resistors are
and EQ settings. 10kW resistors are
recommended for R
I2C
.
SLLSE57D – APRIL 2011 – REVISED JULY 2013
Figure 24. Alternate Low-BOM DP++ Dual-Mode Configuration
OPERATING MODES OVERVIEW
Figure 25. SN75DP130 Operating Modes Flow Diagram
Copyright © 2011–2013, Texas Instruments Incorporated
21
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