Texas Instruments AFE5807 Evaluation Module AFE5807EVM AFE5807EVM Datenbogen
Produktcode
AFE5807EVM
Software Installation and Operation
Figure 1. AFE5807EVM Basic Configuration
1. P1
–
Power supplies connector.
2. JP1, JP2, and JP3 are set to enable 3.3-V, 1.8-V, and 5-V power supplies to device.
3. JP9: enables onboard CMOS clock.
4. JP10: Power supply for onboard CMOS clock oscillator.
5. JP15: Enables onboard VCNT.
6. JP31 always set as
.
3
Software Installation and Operation
The AFE5807EVM GUI (
) can be downloaded from the TI Web site. Follow the directions in
Read Me First.pdf file to install GUI and device driver
4
Test Setup
Two EVMs are required to evaluate the AFE5807 device. The following illustration shows the exact setup
of these two boards and external connectors. For the default configuration as shown in
of these two boards and external connectors. For the default configuration as shown in
, it is
unnecessary to have an external sampling clock and external Vcntl supply. The onboard CMOS clock and
onboard Vcntl are used.
onboard Vcntl are used.
3
SLOU329A
–
November 2011
–
Revised December 2011
AFE5807EVM (Rev E) Evaluation Module
Copyright
©
2011, Texas Instruments Incorporated