Texas Instruments IC MCU 16B MSP430F2002IRSAT VQFN-16 TID MSP430F2002IRSAT Datenbogen
Produktcode
MSP430F2002IRSAT
MSP430F20x3
MSP430F20x2
MSP430F20x1
MSP430F20x2
MSP430F20x1
SLAS491I – AUGUST 2005 – REVISED DECEMBER 2012
Peripherals
Peripherals are connected to the CPU through data, address, and control busses and can be handled using all
instructions. For complete module descriptions, refer to the MSP430F2xx Family User's Guide.
instructions. For complete module descriptions, refer to the MSP430F2xx Family User's Guide.
Oscillator and System Clock
The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal
oscillator, an internal very-low-power low-frequency oscillator and an internal digitally-controlled oscillator (DCO).
The basic clock module is designed to meet the requirements of both low system cost and low power
consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 1 µs. The basic
clock module provides the following clock signals:
•
oscillator, an internal very-low-power low-frequency oscillator and an internal digitally-controlled oscillator (DCO).
The basic clock module is designed to meet the requirements of both low system cost and low power
consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 1 µs. The basic
clock module provides the following clock signals:
•
Auxiliary clock (ACLK), sourced either from a 32768-Hz watch crystal or the internal LF oscillator.
•
Main clock (MCLK), the system clock used by the CPU.
•
Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
Table 11. DCO Calibration Data (Provided From Factory in Flash Information
Memory Segment A)
DCO FREQUENCY
CALIBRATION REGISTER
SIZE
ADDRESS
CALBC1_1MHZ
byte
010FFh
1 MHz
CALDCO_1MHZ
byte
010FEh
CALBC1_8MHZ
byte
010FDh
8 MHz
CALDCO_8MHZ
byte
010FCh
CALBC1_12MHZ
byte
010FBh
12 MHz
CALDCO_12MHZ
byte
010FAh
CALBC1_16MHZ
byte
010F9h
16 MHz
CALDCO_16MHZ
byte
010F8h
Brownout
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on and
power off.
power off.
Digital I/O
There is one 8-bit I/O port implemented—port P1—and two bits of I/O port P2:
•
•
All individual I/O bits are independently programmable.
•
Any combination of input, output, and interrupt condition is possible.
•
Edge-selectable interrupt input capability for all the eight bits of port P1 and the two bits of port P2.
•
Read and write access to port-control registers is supported by all instructions.
•
Each I/O has an individually programmable pullup or pulldown resistor.
Watchdog Timer (WDT+)
The primary function of the watchdog timer (WDT+) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be disabled or configured as an interval timer and can
generate interrupts at selected time intervals.
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be disabled or configured as an interval timer and can
generate interrupts at selected time intervals.
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