Microchip Technology ARD00330 Datenbogen
2010 Microchip Technology Inc.
Preliminary
DS39979A-page 117
PIC18F87J72 FAMILY
TABLE 10-12: PORTE FUNCTIONS
TABLE 10-13: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RE0/LCDBIAS1
RE0
0
O
DIG
LATE<0> data output.
1
I
ST
PORTE<0> data input.
LCDBIAS1
—
I
ANA
LCD module bias voltage input.
RE1/LCDBIAS2
RE1
0
O
DIG
LATE<1> data output.
1
I
ST
PORTE<1> data input.
LCDBIAS2
—
I
ANA
LCD module bias voltage input.
RE3/COM0
RE3
0
O
DIG
LATE<3> data output.
1
I
ST
PORTE<3> data input.
COM0
x
O
ANA
LCD Common 0 output; disables all other outputs.
RE4/COM1
RE4
0
O
DIG
LATE<4> data output.
1
I
ST
PORTE<4> data input.
COM1
x
O
ANA
LCD Common 1 output; disables all other outputs.
RE5/COM2
RE5
0
O
DIG
LATE<5> data output.
1
I
ST
PORTE<5> data input.
COM2
x
O
ANA
LCD Common 2 output; disables all other outputs.
RE6/COM3
RE6
0
O
DIG
LATE<6> data output.
1
I
ST
PORTE<6> data input.
COM3
x
O
ANA
LCD Common 3 output; disables all other outputs.
RE7/CCP2/
SEG31
SEG31
RE7
0
O
DIG
LATE<7> data output.
1
I
ST
PORTE<7> data input.
CCP2
(1)
0
O
DIG
CCP2 Compare/PWM output; takes priority over port data.
1
I
ST
CCP2 Capture input.
SEG31
x
O
ANA
Segment 31 analog output for LCD; disables digital output.
Legend:
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note 1:
Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
PORTE
RE7
RE6
RE5
RE4
RE3
—
RE1
RE0
LATE
LATE7
LATE6
LATE5
LATE4
LATE3
—
LATE1
LATE0
TRISE
TRISE7
TRISE6
TRISE5
TRISE4
TRISE3
—
TRISE1
TRISE0
PORTG
RDPU
REPU
RJPU
RG4
RG3
RG2
RG1
RG0
TRISG
SPIOD
CCP2OD CCP1OD
TRISG4
TRISG3
TRISG2
TRISG1
TRISG0
LCDCON
LCDEN
SLPEN
WERR
—
CS1
CS0
LMUX1
LMUX0
LCDSE3
SE31
SE30
SE29
SE28
SE27
SE26
SE25
SE24
Legend: Shaded cells are not used by PORTE.