Texas Instruments DS90UB913A-CXEVM: FPD-Link III Serializer Evaluation Module DS90UB913A-CXEVM DS90UB913A-CXEVM Datenbogen
Produktcode
DS90UB913A-CXEVM
LVCMOS Input Connector Description (On DS90UB913AQ board)
Figure 2-2. Serial link connection using a single 50
Ω
coaxial cable
2.3
LVCMOS Input Connector Description (On DS90UB913AQ board)
JP1 – GPO0, GPO1, CLK OUT, CLK IN, DIN[11:0], HSYNC, VSYNC, PCLK IN are the input pins for the
LVCMOS interface on Serializer board. The even numbered pins are the input signals. All the odd
numbered pins are connected to VSS. Refer to
LVCMOS interface on Serializer board. The even numbered pins are the input signals. All the odd
numbered pins are connected to VSS. Refer to
below.
JP10 and JP1 pins are not connected.
Figure 2-3. Parallel Input Connector on Serializer Board
2.4
LVCMOS Output Connector Description (On DS90UB914AQ board)
JP1 – ROUT[11:0], HSYNC, VSYNC, PCLKO are the pins of output connector for the LVCMOS interface
on Deserializer board. The even numbered pins are the output signals. All the odd numbered pins are
connected to VSS.
on Deserializer board. The even numbered pins are the output signals. All the odd numbered pins are
connected to VSS.
JP8– GPIO0, GPIO1, GPIO2, GPIO3 are the access points for DS90UB914AQ GPIO data. Refer to
below.
7
SNLU135 – JUNE 2013
Board Setup Details
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