Microchip Technology MA330031-2 Datenbogen
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 326
2011-2013 Microchip Technology Inc.
bit 7-5
SSRC<2:0>:
Sample Trigger Source Select bits
If SSRCG = 1:
111
111
= Reserved
110
= PTGO15 primary trigger compare ends sampling and starts conversion
(
)
101
= PTGO14 primary trigger compare ends sampling and starts conversion
(
)
100
= PTGO13 primary trigger compare ends sampling and starts conversion
(
)
011
= PTGO12 primary trigger compare ends sampling and starts conversion
(
)
010
= PWM Generator 3 primary trigger compare ends sampling and starts conversion
001
= PWM Generator 2 primary trigger compare ends sampling and starts conversion
000
= PWM Generator 1 primary trigger compare ends sampling and starts conversion
If SSRCG = 0:
111
111
= Internal counter ends sampling and starts conversion (auto-convert)
110
= CTMU ends sampling and starts conversion
101
= Reserved
100
= Timer5 compare ends sampling and starts conversion
011
= PWM primary Special Event Trigger ends sampling and starts conversion
010
= Timer3 compare ends sampling and starts conversion
001
= Active transition on the INT0 pin ends sampling and starts conversion
000
= Clearing the Sample bit (SAMP) ends sampling and starts conversion (Manual mode)
bit 4
SSRCG:
Sample Trigger Source Group bit
See SSRC<2:0> for details.
bit 3
SIMSAM:
Simultaneous Sample Select bit (only applicable when CHPS<1:0> = 01 or 1x)
In 12-bit mode (AD21B = 1), SIMSAM is Unimplemented and is Read as ‘0’:
1
1
= Samples CH0, CH1, CH2, CH3 simultaneously (when CHPS<1:0> = 1x); or samples CH0 and CH1
simultaneously (when CHPS<1:0> = 01)
0
= Samples multiple channels individually in sequence
bit 2
ASAM:
ADC1 Sample Auto-Start bit
1
= Sampling begins immediately after the last conversion; SAMP bit is auto-set
0
= Sampling begins when the SAMP bit is set
bit 1
SAMP:
ADC1 Sample Enable bit
1
= ADC Sample-and-Hold amplifiers are sampling
0
= ADC Sample-and-Hold amplifiers are holding
If ASAM = 0, software can write ‘1’ to begin sampling. Automatically set by hardware if ASAM = 1. If
SSRC<2:0> = 000, software can write ‘0’ to end sampling and start conversion. If SSRC<2:0>
SSRC<2:0> = 000, software can write ‘0’ to end sampling and start conversion. If SSRC<2:0>
000,
automatically cleared by hardware to end sampling and start conversion.
bit 0
DONE:
ADC1 Conversion Status bit
1
= ADC conversion cycle has completed
0
= ADC conversion has not started or is in progress
Automatically set by hardware when the ADC conversion is complete. Software can write ‘0’ to clear the
DONE status bit (software is not allowed to write ‘1’). Clearing this bit does NOT affect any operation in
progress. Automatically cleared by hardware at the start of a new conversion.
DONE status bit (software is not allowed to write ‘1’). Clearing this bit does NOT affect any operation in
progress. Automatically cleared by hardware at the start of a new conversion.
REGISTER 23-1:
AD1CON1: ADC1 CONTROL REGISTER 1 (CONTINUED)
Note 1:
See
Section 24.0 “Peripheral Trigger Generator (PTG) Module”
for information on this selection.
2:
This setting is available in dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X devices only.
3:
Do not clear the DONE bit in software if Auto-Sample is enabled (ASAM = 1).