Microchip Technology MA330028 Datenbogen
2011-2013 Microchip Technology Inc.
DS70000657H-page 221
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
15.2
Output Compare Control Registers
REGISTER 15-1:
OCxCON1: OUTPUT COMPARE x CONTROL REGISTER 1
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
—
—
OCSIDL
OCTSEL2
OCTSEL1
OCTSEL0
—
ENFLTB
bit 15
bit 8
R/W-0
U-0
R/W-0, HSC R/W-0, HSC
R/W-0
R/W-0
R/W-0
R/W-0
ENFLTA
—
OCFLTB
OCFLTA
TRIGMODE
OCM2
OCM1
OCM0
bit 7
bit 0
Legend:
HSC = Hardware Settable/Clearable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
Unimplemented:
Read as ‘0’
bit 13
OCSIDL:
Output Compare x Stop in Idle Mode Control bit
1
= Output Compare x Halts in CPU Idle mode
0
= Output Compare x continues to operate in CPU Idle mode
bit 12-10
OCTSEL<2:0>:
Output Compare x Clock Select bits
111
= Peripheral clock (F
P
)
110
= Reserved
101
= PTGOx clock
(
100
= T1CLK is the clock source of the OCx (only the synchronous clock is supported)
011
= T5CLK is the clock source of the OCx
010
= T4CLK is the clock source of the OCx
001
= T3CLK is the clock source of the OCx
000
= T2CLK is the clock source of the OCx
bit 9
Unimplemented:
Read as ‘0’
bit 8
ENFLTB:
Fault B Input Enable bit
1
= Output Compare Fault B input (OCFB) is enabled
0
= Output Compare Fault B input (OCFB) is disabled
bit 7
ENFLTA:
Fault A Input Enable bit
1
= Output Compare Fault A input (OCFA) is enabled
0
= Output Compare Fault A input (OCFA) is disabled
bit 6
Unimplemented:
Read as ‘0’
bit 5
OCFLTB:
PWM Fault B Condition Status bit
1
= PWM Fault B condition on OCFB pin has occurred
0
= No PWM Fault B condition on OCFB pin has occurred
bit 4
OCFLTA:
PWM Fault A Condition Status bit
1
= PWM Fault A condition on OCFA pin has occurred
0
= No PWM Fault A condition on OCFA pin has occurred
Note 1:
OCxR and OCxRS are double-buffered in PWM mode only.
2:
Each Output Compare x module (OCx) has one PTG clock source. See
for more information.
PTGO4 = OC1
PTGO5 = OC2
PTGO6 = OC3
PTGO7 = OC4
PTGO5 = OC2
PTGO6 = OC3
PTGO7 = OC4