Microchip Technology DM164134 Datenbogen
© 2006 Microchip Technology Inc.
DS41159E-page 119
PIC18FXX8
14.0
TIMER3 MODULE
The Timer3 module timer/counter has the following
features:
features:
• 16-bit timer/counter
(two 8-bit registers: TMR3H and TMR3L)
• Readable and writable (both registers)
• Internal or external clock select
• Interrupt-on-overflow from FFFFh to 0000h
• Reset from CCP1/ECCP1 module trigger
Figure 14-1 is a simplified block diagram of the Timer3
module.
module.
Register 14-1 shows the Timer3 Control register. This
register controls the operating mode of the Timer3
module and sets the CCP1 and ECCP1 clock source.
register controls the operating mode of the Timer3
module and sets the CCP1 and ECCP1 clock source.
Register 12-1 shows the Timer1 Control register. This
register controls the operating mode of the Timer1
module, as well as contains the Timer1 Oscillator
Enable bit (T1OSCEN) which can be a clock source for
Timer3.
register controls the operating mode of the Timer1
module, as well as contains the Timer1 Oscillator
Enable bit (T1OSCEN) which can be a clock source for
Timer3.
REGISTER 14-1:
T3CON:TIMER3 CONTROL REGISTER
Note:
Timer3 is disabled on POR.
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
RD16
T3ECCP1 T3CKPS1 T3CKPS0
T3CCP1
T3SYNC
TMR3CS
TMR3ON
bit 7
bit 0
bit 7
RD16: 16-bit Read/Write Mode Enable bit
1
= Enables register read/write of Timer3 in one 16-bit operation
0
= Enables register read/write of Timer3 in two 8-bit operations
bit 6,3
T3ECCP1:T3CCP1: Timer3 and Timer1 to CCP1/ECCP1 Enable bits
1x
= Timer3 is the clock source for compare/capture CCP1 and ECCP1 modules
01
= Timer3 is the clock source for compare/capture of ECCP1,
Timer1 is the clock source for compare/capture of CCP1
00
= Timer1 is the clock source for compare/capture CCP1 and ECCP1 modules
bit 5-4
T3CKPS1:T3CKPS0: Timer3 Input Clock Prescale Select bits
11
= 1:8 Prescale value
10
= 1:4 Prescale value
01
= 1:2 Prescale value
00
= 1:1 Prescale value
bit 2
T3SYNC: Timer3 External Clock Input Synchronization Control bit
(Not usable if the system clock comes from Timer1/Timer3.)
When TMR3CS = 1:
1
1
= Do not synchronize external clock input
0
= Synchronize external clock input
When TMR3CS = 0:
This bit is ignored. Timer3 uses the internal clock when TMR3CS = 0.
bit 1
TMR3CS: Timer3 Clock Source Select bit
1
= External clock input from Timer1 oscillator or T1CKI (on the rising edge after the first falling edge)
0
= Internal clock (F
OSC
/4)
bit 0
TMR3ON: Timer3 On bit
1
= Enables Timer3
0
= Stops Timer3
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown