Microchip Technology DM164134 Datenbogen

DS41159E-page 20

© 2006 Microchip Technology Inc.

The PIC18FXX8 devices include a feature that allows
the system clock source to be switched from the main
oscillator to an alternate low-frequency clock source.
For the PIC18FXX8 devices, this alternate clock source
is the Timer1 oscillator. If a low-frequency crystal
(32 kHz, for example) has been attached to the Timer1
oscillator pins and the Timer1 oscillator has been
enabled, the device can switch to a Low-Power Execu-
tion mode. Figure 2-6 shows a block diagram of the
system clock sources. The clock switching feature is
enabled by programming the Oscillator Switching
Enable (OSCSEN) bit in Configuration register,
CONFIG1H, to a ‘0’. Clock switching is disabled in an
erased device. See Section 12.2 “Timer1 Oscillator”
for further details of the Timer1 oscillator and
Section 24.1 “Configuration Bits” for Configuration
register details.

2.6.1

SYSTEM CLOCK SWITCH BIT

The system clock source switching is performed under
software control. The system clock switch bit, SCS
(OSCCON register), controls the clock switching. When
the SCS bit is ‘0’, the system clock source comes from
the main oscillator selected by the FOSC2:FOSC0
configuration bits. When the SCS bit is set, the system
clock source comes from the Timer1 oscillator. The SCS
bit is cleared on all forms of Reset.

The Timer1 oscillator must be enabled to
switch the system clock source. The
Timer1 oscillator is enabled by setting the
T1OSCEN bit in the Timer1 Control regis-
ter (T1CON). If the Timer1 oscillator is not
enabled, any write to the SCS bit will be
ignored (SCS bit forced cleared) and the
main oscillator continues to be the system
clock source.

U-0

U-0

U-0

U-0

U-0

U-0

U-0

R/W-1

—

—

—

—

—

—

—

SCS

bit 7

bit 0

bit 7-1

Unimplemented: Read as ‘0’

bit 0

SCS: System Clock Switch bit 

When OSCSEN configuration bit = 0 and T1OSCEN bit is set:    
1

 =  Switch to Timer1 oscillator/clock pin 

0

 =  Use primary oscillator/clock input pin

When OSCSEN is clear or T1OSCEN is clear: 
Bit is forced clear.

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

T

OSC

4 x PLL

T

T

1

P

T

SCLK

Clock

Source 

MU

X

T

OSC

/4

Timer 1 Oscillator

T1OSCEN
Enable
Oscillator

T1OSO

T1OSI

Clock Source Option 
for Other Modules

OSC1

OSC2

Sleep

Main Oscillator

I/O pins have diode protection to V

DD

 and V

SS

.