Microchip Technology DM164134 Datenbogen
PIC18FXX8
DS41159E-page 260
© 2006 Microchip Technology Inc.
FIGURE 23-2:
LOW-VOLTAGE DETECT (LVD) BLOCK DIAGRAM
The LVD module has an additional feature that allows
the user to supply the trip voltage to the module from an
external source. This mode is enabled when bits
LVDL3:LVDL0 are set to ‘1111’. In this state, the com-
parator input is multiplexed from the external input pin
LVDIN to one input of the comparator (Figure 23-3).
the user to supply the trip voltage to the module from an
external source. This mode is enabled when bits
LVDL3:LVDL0 are set to ‘1111’. In this state, the com-
parator input is multiplexed from the external input pin
LVDIN to one input of the comparator (Figure 23-3).
The other input is connected to the internally generated
voltage reference (parameter #D423 in Section 27.2
“DC Characteristics”). This gives users flexibility,
because it allows them to configure the Low-Voltage
Detect interrupt to occur at any voltage in the valid
operating range.
voltage reference (parameter #D423 in Section 27.2
“DC Characteristics”). This gives users flexibility,
because it allows them to configure the Low-Voltage
Detect interrupt to occur at any voltage in the valid
operating range.
FIGURE 23-3:
LOW-VOLTAGE DETECT (LVD) WITH EXTERNAL INPUT BLOCK DIAGRAM
LVDIF
V
DD
1
6
-t
o
-1
MU
X
LVDEN
LVDCON
Internally Generated
Reference Voltage,
Reference Voltage,
LVDIN
LVDL3:LVDL0
Register
1.2V Typical
LVD
EN
1
6
-t
o
-1
MU
X
BGAP
BODEN
LVDEN
VxEN
LVDIN
V
DD
V
DD
Externally Generated
Trip Point
LVDL3:LVDL0
LVDCON
Register