Microchip Technology DM183037 Datenbogen
2012 Microchip Technology Inc.
DS30575A-page 685
PIC18F97J94 FAMILY
Extended Instruction Set .......................................... 138
Hard Memory Vectors .............................................. 114
Instructions ............................................................... 119
Hard Memory Vectors .............................................. 114
Instructions ............................................................... 119
Interrupt Vector ........................................................ 114
Look-up Tables ........................................................ 117
Organization ............................................................. 114
Reset Vector ............................................................ 114
Look-up Tables ........................................................ 117
Organization ............................................................. 114
Reset Vector ............................................................ 114
Programming, Device Instructions ................................... 575
PSP.See Parallel Slave Port.
Pulse Steering .................................................................. 334
Pulse-Width Modulation. See PWM (CCP Module).
PUSH ............................................................................... 604
PUSH and POP Instructions ............................................ 116
PUSHL ............................................................................. 620
PWM (CCP Module)
PSP.See Parallel Slave Port.
Pulse Steering .................................................................. 334
Pulse-Width Modulation. See PWM (CCP Module).
PUSH ............................................................................... 604
PUSH and POP Instructions ............................................ 116
PUSHL ............................................................................. 620
PWM (CCP Module)
Duty Cycle ................................................................ 349
Example Frequencies/Resolutions .......................... 349
Period ....................................................................... 348
Setup for PWM Operation ........................................ 349
TMR2 to PR2 Match ................................................ 348
Example Frequencies/Resolutions .......................... 349
Period ....................................................................... 348
Setup for PWM Operation ........................................ 349
TMR2 to PR2 Match ................................................ 348
PWM (ECCP Module)
Effects of a Reset ..................................................... 337
Operation in Power-Managed Modes ...................... 337
Operation with Fail-Safe Clock Monitor ................... 337
Pulse Steering Mode ................................................ 334
Steering Synchronization ......................................... 336
Operation in Power-Managed Modes ...................... 337
Operation with Fail-Safe Clock Monitor ................... 337
Pulse Steering Mode ................................................ 334
Steering Synchronization ......................................... 336
PWM Mode. See Enhanced Capture/Compare/PWM ..... 323
Q
R
RAM. See Data Memory.
RCALL ............................................................................. 605
RCONx Bit Operation on Resets and Wake-ups ............... 96
Reader Response ............................................................ 692
Real-Time Clock and Calendar (RTCC) ........................... 297
RCALL ............................................................................. 605
RCONx Bit Operation on Resets and Wake-ups ............... 96
Reader Response ............................................................ 692
Real-Time Clock and Calendar (RTCC) ........................... 297
Applications ................................................................ 62
Enable Signal ............................................................. 63
Operation in Sleep ............................................... 45, 63
REFO1, REFO2 ......................................................... 62
Source .................................................................. 45, 62
Synchronization ................................................... 45, 63
Enable Signal ............................................................. 63
Operation in Sleep ............................................... 45, 63
REFO1, REFO2 ......................................................... 62
Source .................................................................. 45, 62
Synchronization ................................................... 45, 63
Register File ..................................................................... 122
Register File Summary ............................................ 124–135
Registers
Register File Summary ............................................ 124–135
Registers
ACTCON (Active Clock Tuning Control) .................... 61
ADCHS0H (A/D Sample Select 0 High) ................... 448
ADCHS0L (A/D Sample Select 0 Low) .................... 449
ADCON1H (A/D Control 1 High) .............................. 441
ADCON1L (A/D Control 1 Low) ............................... 442
ADCON2H (A/D Control 2 High) .............................. 443
ADCON2L (A/D Control 2 Low) ............................... 444
ADCON3H (A/D Control 3 High) .............................. 445
ADCON3L (A/D Control 3 Low) ............................... 445
ADCON5H
ADCHS0H (A/D Sample Select 0 High) ................... 448
ADCHS0L (A/D Sample Select 0 Low) .................... 449
ADCON1H (A/D Control 1 High) .............................. 441
ADCON1L (A/D Control 1 Low) ............................... 442
ADCON2H (A/D Control 2 High) .............................. 443
ADCON2L (A/D Control 2 Low) ............................... 444
ADCON3H (A/D Control 3 High) .............................. 445
ADCON3L (A/D Control 3 Low) ............................... 445
ADCON5H
ADCON5L (A/D Control 5 Low) ............................... 447
ADCSS0H (A/D Input Scan Select 0 High) .............. 453
ADCSS0L (A/D Input Scan Select 0 Low) ............... 453
ADCSS1H (A/D Input Scan Select 1 High) .............. 452
ADCSS1L (A/D Input Scan Select 1 Low) ............... 452
ADCTMUEN0H (CTMU Enable 0 High) ................... 455
ADCSS0H (A/D Input Scan Select 0 High) .............. 453
ADCSS0L (A/D Input Scan Select 0 Low) ............... 453
ADCSS1H (A/D Input Scan Select 1 High) .............. 452
ADCSS1L (A/D Input Scan Select 1 Low) ............... 452
ADCTMUEN0H (CTMU Enable 0 High) ................... 455
ADCTMUEN0L (CTMU Enable,0 Low) .................... 455
ADCTMUEN1H (CTMU Enable 1 High) .................. 454
ADCTMUEN1L (CTMU Enable 1 Low) .................... 454
ADHIT0H (A/D Scan Compare Hit 0 High) .............. 451
ADHIT0L (A/D Scan Compare Hit 0 Low) ............... 451
ADHIT1H (A/D Scan Compare Hit 1 High) .............. 450
ADHIT1L (A/D Scan Compare Hit 1 Low) ............... 450
ALRMCFG (Alarm Configuration) ............................ 302
ALRMDAY (Alarm Day Value) ................................. 307
ALRMHR (Alarm Hours Value) ................................ 308
ALRMMIN (Alarm Minutes Value) ........................... 309
ALRMMNTH (Alarm Month Value) .......................... 307
ALRMRPT (Alarm Repeat) ...................................... 303
ALRMSEC (Alarm Seconds Value) ......................... 309
ALRMWD (Alarm Weekday Value) .......................... 308
ANCON1 (Analog Select Control 1) ........................ 438
ANCON2 (Analog Select Control 2) ........................ 439
ANCON3 (Analog Select Control 3) ........................ 440
BAUDCONx (Baud Rate Control x) ......................... 414
BDnSTAT ................................................................ 535
BDnSTAT (Buffer Descriptor n Status, CPU Mode) 536
BDnSTAT (Buffer Descriptor n Status, SIE Mode) .. 537
BDnSTAT (SIE Mode) ............................................. 537
Buffer Descriptors, Summary .................................. 539
CCPRxH (CCPx Period High Byte) ......................... 342
CCPRxL (CCPx Period Low Byte) ........................... 342
CCPTMRS0 (CCP Timer Select 0) .......................... 319
CCPTMRS1 (CCP Timer Select 1) .......................... 340
CCPTMRS2 (CCP Timer Select 2) .......................... 341
CCPxCON (CCP4-CCP10 Control) ......................... 339
CCPxCON (Enhanced Capture/Compare/PWMx
ADCTMUEN1H (CTMU Enable 1 High) .................. 454
ADCTMUEN1L (CTMU Enable 1 Low) .................... 454
ADHIT0H (A/D Scan Compare Hit 0 High) .............. 451
ADHIT0L (A/D Scan Compare Hit 0 Low) ............... 451
ADHIT1H (A/D Scan Compare Hit 1 High) .............. 450
ADHIT1L (A/D Scan Compare Hit 1 Low) ............... 450
ALRMCFG (Alarm Configuration) ............................ 302
ALRMDAY (Alarm Day Value) ................................. 307
ALRMHR (Alarm Hours Value) ................................ 308
ALRMMIN (Alarm Minutes Value) ........................... 309
ALRMMNTH (Alarm Month Value) .......................... 307
ALRMRPT (Alarm Repeat) ...................................... 303
ALRMSEC (Alarm Seconds Value) ......................... 309
ALRMWD (Alarm Weekday Value) .......................... 308
ANCON1 (Analog Select Control 1) ........................ 438
ANCON2 (Analog Select Control 2) ........................ 439
ANCON3 (Analog Select Control 3) ........................ 440
BAUDCONx (Baud Rate Control x) ......................... 414
BDnSTAT ................................................................ 535
BDnSTAT (Buffer Descriptor n Status, CPU Mode) 536
BDnSTAT (Buffer Descriptor n Status, SIE Mode) .. 537
BDnSTAT (SIE Mode) ............................................. 537
Buffer Descriptors, Summary .................................. 539
CCPRxH (CCPx Period High Byte) ......................... 342
CCPRxL (CCPx Period Low Byte) ........................... 342
CCPTMRS0 (CCP Timer Select 0) .......................... 319
CCPTMRS1 (CCP Timer Select 1) .......................... 340
CCPTMRS2 (CCP Timer Select 2) .......................... 341
CCPxCON (CCP4-CCP10 Control) ......................... 339
CCPxCON (Enhanced Capture/Compare/PWMx
CMSTAT (Comparator Status) ................................ 491
CMxCON (Comparator Control x) ........................... 490
CONFIG1H (Configuration 1 High) .......................... 555
CONFIG1L (Configuration 1 Low) ........................... 555
CONFIG2H (Configuration 2 High) .......................... 557
CONFIG2L (Configuration 2 Low) ........................... 556
CONFIG3L (Configuration 3 Low) ........................... 558
CONFIG4H (Configuration 4 High) .......................... 559
CONFIG4L (Configuration 4 Low) ........................... 559
CONFIG5H (Configuration 5 High) .......................... 561
CONFIG5L (Configuration 5 Low) ........................... 560
CONFIG6H (Configuration 6 High) .......................... 563
CONFIG6L (Configuration 6 Low) ........................... 562
CONFIG7L (Configuration 7 Low) ........................... 564
CONFIG8H (Configuration 8 High) .......................... 566
CONFIG8L (Configuration 8 Low) ........................... 565
CTMUCON (CTMU Control) .................................... 508
CTMUCON1 (CTMU Current Control 1) .................. 509
CTMUCON2 (CTMU Current Control 2) .................. 510
CTMUCON3 (CTMU Current Control 3) .................. 511
CVRCONH (Comparator Voltage Reference
CMxCON (Comparator Control x) ........................... 490
CONFIG1H (Configuration 1 High) .......................... 555
CONFIG1L (Configuration 1 Low) ........................... 555
CONFIG2H (Configuration 2 High) .......................... 557
CONFIG2L (Configuration 2 Low) ........................... 556
CONFIG3L (Configuration 3 Low) ........................... 558
CONFIG4H (Configuration 4 High) .......................... 559
CONFIG4L (Configuration 4 Low) ........................... 559
CONFIG5H (Configuration 5 High) .......................... 561
CONFIG5L (Configuration 5 Low) ........................... 560
CONFIG6H (Configuration 6 High) .......................... 563
CONFIG6L (Configuration 6 Low) ........................... 562
CONFIG7L (Configuration 7 Low) ........................... 564
CONFIG8H (Configuration 8 High) .......................... 566
CONFIG8L (Configuration 8 Low) ........................... 565
CTMUCON (CTMU Control) .................................... 508
CTMUCON1 (CTMU Current Control 1) .................. 509
CTMUCON2 (CTMU Current Control 2) .................. 510
CTMUCON3 (CTMU Current Control 3) .................. 511
CVRCONH (Comparator Voltage Reference
DAY (Day Value) ..................................................... 305
DEVID1 (Device ID 1) .............................................. 567
DEVID2 (Device ID 2) .............................................. 567
DMACON1 (DMA Control 1) .................................... 364
DMACON2 (DMA Control 2) .................................... 365
DSCONH (Deep Sleep Control High) ........................ 77
DSCONL (Deep Sleep Control Low) ......................... 77
DSWAKEH (Deep Sleep Wake-up Source High) ...... 78
DSWAKEL (Deep Sleep Wake-up Source Low) ....... 78
DEVID1 (Device ID 1) .............................................. 567
DEVID2 (Device ID 2) .............................................. 567
DMACON1 (DMA Control 1) .................................... 364
DMACON2 (DMA Control 2) .................................... 365
DSCONH (Deep Sleep Control High) ........................ 77
DSCONL (Deep Sleep Control Low) ......................... 77
DSWAKEH (Deep Sleep Wake-up Source High) ...... 78
DSWAKEL (Deep Sleep Wake-up Source Low) ....... 78