Microchip Technology AC244045 Datenbogen
PIC16(L)F1825/1829
DS41440C-page 210
2010-2012 Microchip Technology Inc.
REGISTER 23-3:
MDCARH: MODULATION HIGH CARRIER CONTROL REGISTER
R/W-x/u
R/W-x/u
R/W-x/u
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
MDCHODIS
MDCHPOL MDCHSYNC
—
MDCH<3:0>
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7
MDCHODIS:
Modulator High Carrier Output Disable bit
1 = Output signal driving the peripheral output pin (selected by MDCH<3:0>) is disabled
0 = Output signal driving the peripheral output pin (selected by MDCH<3:0>) is enabled
0 = Output signal driving the peripheral output pin (selected by MDCH<3:0>) is enabled
bit 6
MDCHPOL:
Modulator High Carrier Polarity Select bit
1 = Selected high carrier signal is inverted
0 = Selected high carrier signal is not inverted
0 = Selected high carrier signal is not inverted
bit 5
MDCHSYNC:
Modulator High Carrier Synchronization Enable bit
1 = Modulator waits for a falling edge on the high time carrier signal before allowing a switch to the
low time carrier
0 = Modulator Output is not synchronized to the high time carrier signal
(1)
bit 4
Unimplemented:
Read as ‘0’
bit 3-0
MDCH<3:0>
Modulator Data High Carrier Selection bits
(1)
1111 = Reserved. No channel connected.
•
•
•
•
•
1000 = Reserved. No channel connected.
0111 = CCP4 output (PWM Output mode only)
0110 = CCP3 output (PWM Output mode only)
0101 = CCP2 output (PWM Output mode only)
0100 = CCP1 output (PWM Output mode only)
0011 = Reference Clock module signal (CLKR)
0010 = MDCIN2 port pin
0001 = MDCIN1 port pin
0000 = V
0111 = CCP4 output (PWM Output mode only)
0110 = CCP3 output (PWM Output mode only)
0101 = CCP2 output (PWM Output mode only)
0100 = CCP1 output (PWM Output mode only)
0011 = Reference Clock module signal (CLKR)
0010 = MDCIN2 port pin
0001 = MDCIN1 port pin
0000 = V
SS
Note 1:
Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.