Freescale Semiconductor DEMO9S08DZ60 Demo Board DEMO9S08DZ60 DEMO9S08DZ60 Datenbogen
Produktcode
DEMO9S08DZ60
Chapter 4 Memory
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
53
•
Burst programming capability
•
Sector erase abort
4.5.2
Program and Erase Times
Before any program or erase command can be accepted, the Flash and EEPROM clock divider register
(FCDIV) must be written to set the internal clock for the Flash and EEPROM module to a frequency
(f
(FCDIV) must be written to set the internal clock for the Flash and EEPROM module to a frequency
(f
FCLK
) between 150 kHz and 200 kHz (see
”). This register can be written only once, so normally this write is performed during
reset initialization. The user must ensure that FACCERR is not set before writing to the FCDIV register.
One period of the resulting clock (1/f
One period of the resulting clock (1/f
FCLK
) is used by the command processor to time program and erase
pulses. An integer number of these timing pulses is used by the command processor to complete a program
or erase command.
or erase command.
shows program and erase times. The bus clock frequency and FCDIV determine the frequency
of FCLK (f
FCLK
). The time for one cycle of FCLK is t
FCLK
= 1/f
FCLK
. The times are shown as a number
of cycles of FCLK and as an absolute time for the case where t
FCLK
= 5
μs. Program and erase times
shown include overhead for the command state machine and enabling and disabling of program and erase
voltages.
voltages.
4.5.3
Program and Erase Command Execution
The FCDIV register must be initialized after any reset and any error flag is cleared before beginning
command execution. The command execution steps are:
command execution. The command execution steps are:
1. Write a data value to an address in the Flash or EEPROM array. The address and data information
from this write is latched into the Flash and EEPROM interface. This write is a required first step
in any command sequence. For erase and blank check commands, the value of the data is not
important. For sector erase commands, the address can be any address in the sector of Flash or
EEPROM to be erased. For mass erase and blank check commands, the address can be any address
in the Flash or EEPROM memory. Flash and EEPROM erase independently of each other.
in any command sequence. For erase and blank check commands, the value of the data is not
important. For sector erase commands, the address can be any address in the sector of Flash or
EEPROM to be erased. For mass erase and blank check commands, the address can be any address
in the Flash or EEPROM memory. Flash and EEPROM erase independently of each other.
Table 4-6. Program and Erase Times
Parameter
Cycles of FCLK
Time if FCLK = 200 kHz
Byte program
9
45
μ
s
Burst program
4
20
μ
s
1
1
Excluding start/end overhead
Sector erase
4000
20 ms
Mass erase
20,000
100 ms
Sector erase abort
4
20
μ
s
1