Freescale Semiconductor MC56F8006 Demo board MC56F8006DEMO MC56F8006DEMO Datenbogen

Freescale Semiconductor

32

 provides the 56F8006/56F8002’s reset and interrupt priority structure, including on-chip peripherals. 

The locations of on-chip peripheral registers are part of the data memory map on the 56800E series. These locations may be 
accessed with the same addressing modes used for ordinary data memory, except all peripheral registers should be read or 
written using word accesses only.

 summarizes the base addresses for the set of peripherals on the 56F8006/56F8002 devices. Peripherals are listed in 

order of the base address.

Dual Channel Timer 

TMR

X:0x00 F000

PWM Module

PWM

X:0x00 F020

Interrupt Controller

INTC

X:0x00 F040

ADCA

ADCA

X:0x00 F060

ADCB

ADCB

X:0x00 F080

Programmable Gain Amplifier 0

PGA0

X:0x00 F0A0

Programmable Gain Amplifier 1

PGA1

X:0x00 F0C0

SCI

SCI

X:0x00 F0E0

SPI

SPI

X:0x00 F100

I

2

C

I

2

C

X:0x00 F120

Computer Operating Properly

COP

X:0x00 F140

On-Chip Clock Synthesis

OCCS

X:0x00 F160

GPIO Port A

GPIOA

X:0x00 F180

GPIO Port B

GPIOB

X:0x00 F1A0

GPIO Port C

GPIOC

X:0x00 F1C0

GPIO Port D

GPIOD

X:0x00 F1E0

GPIO Port E

GPIOE

X:0x00 F200

GPIO Port F

GPIOF

X:0x00 F220

System Integration Module

SIM

X:0x00 F240

Power Management Controller

PMC

X:0x00 F260

Analog Comparator 0

CMP0

X:0x00 F280

Analog Comparator 1

CMP1

X:0x00 F2A0

Analog Comparator 2

CMP2

X:0x00 F2C0

Programmable Interval Timer

PIT

X:0x00 F2E0

Programmable Delay Block

PDB

X:0x00 F300

Real Timer Clock

RTC

X:0x00 F320

Flash Memory Interface

FM

X:0x00 F400