Freescale Semiconductor MC9S12G128 Evaluation Board TWR-S12G128-KIT TWR-S12G128-KIT Datenbogen

676

Freescale Semiconductor

Read: Anytime

Write: Anytime

1

1

Reserved

Module Base + 0x0003

7

6

5

4

3

2

1

0

R

TIE

TCIE

RIE

ILIE

TE

RE

RWU

SBK

W

Reset

0

0

0

0

0

0

0

0

7

TIE

Transmitter Interrupt Enable Bit — TIE enables the transmit data register empty flag, TDRE, to generate
interrupt requests.
0 TDRE interrupt requests disabled
1 TDRE interrupt requests enabled

6

TCIE

Transmission Complete Interrupt Enable Bit — TCIE enables the transmission complete flag, TC, to generate
interrupt requests.
0 TC interrupt requests disabled
1 TC interrupt requests enabled

5

RIE

Receiver Full Interrupt Enable Bit — RIE enables the receive data register full flag, RDRF, or the overrun flag,
OR, to generate interrupt requests.
0 RDRF and OR interrupt requests disabled
1 RDRF and OR interrupt requests enabled

4

ILIE

Idle Line Interrupt Enable Bit — ILIE enables the idle line flag, IDLE, to generate interrupt requests.
0 IDLE interrupt requests disabled
1 IDLE interrupt requests enabled

3

TE

Transmitter Enable Bit — TE enables the SCI transmitter and configures the TXD pin as being controlled by
the SCI. The TE bit can be used to queue an idle preamble.
0 Transmitter disabled
1 Transmitter enabled

2

RE

Receiver Enable Bit — RE enables the SCI receiver.
0 Receiver disabled
1 Receiver enabled