Freescale Semiconductor TWR-S12G64 Scalable Platform for Automotive Applications TWR-S12G64-KIT TWR-S12G64-KIT Datenbogen
Produktcode
TWR-S12G64-KIT
Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual,
Rev.1.23
246
Freescale Semiconductor
2.4.3.61
Port AD Interrupt Enable Register (PIE0AD)
Read: Anytime
2.4.3.62
Port AD Interrupt Enable Register (PIE1AD)
Read: Anytime
Address 0x027C (
Access: User read/write
1
1
Read: Anytime
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PIE0AD7
PIE0AD6
PIE0AD5
PIE0AD4
PIE0AD3
PIE0AD2
PIE0AD1
PIE0AD0
W
Reset
0
0
0
0
0
0
0
0
Address 0x027C (
Access: User read/write
7
6
5
4
3
2
1
0
R
0
0
0
0
PIE0AD3
PIE0AD2
PIE0AD1
PIE0AD0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-60. Port AD Interrupt Enable Register (PIE0AD)
Table 2-87. PIE0AD Register Field Descriptions
Field
Description
7-0
PIE0AD
Port AD interrupt enable—
This bit enables or disables the edge sensitive pin interrupt on the associated pin. An interrupt can be generated if
the pin is operating in input or output mode when in use with the general-purpose or related peripheral function.
This bit enables or disables the edge sensitive pin interrupt on the associated pin. An interrupt can be generated if
the pin is operating in input or output mode when in use with the general-purpose or related peripheral function.
1 Interrupt is enabled
0 Interrupt is disabled (interrupt flag masked)
0 Interrupt is disabled (interrupt flag masked)
Address 0x027D
Access: User read/write
1
1
Read: Anytime
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PIE1AD7
PIE1AD6
PIE1AD5
PIE1AD4
PIE1AD3
PIE1AD2
PIE1AD1
PIE1AD0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-61. Port AD Interrupt Enable Register (PIE1AD)