Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Datenbogen
Produktcode
AT91SAM9N12-EK
Tightly-Coupled Memory Interface
ARM DDI0198D
Copyright © 2001-2003 ARM Limited. All rights reserved.
5-7
5.2.2
Instruction TCM signals
The instruction side TCM signals are almost identical to the DTCM signals. All the
signals on the DTCM have an equivalent on the instruction side.
signals on the DTCM have an equivalent on the instruction side.
•
Control signals
—
IRCS
—
IRWAIT
—
IRIDLE
•
Address and attribute signals
—
IRSEQ
—
IRADDR[17:0]
—
IRWBL[3:0]
—
IRnRW
•
Data signals
—
IRRD[31:0]
—
IRWD[31:0]
•
DMA signals
—
IRDMAEN
—
IRDMACS
—
IRDMAADDR[17:0].
5.2.3
Differences between DTCM and ITCM
There are three differences between the DTCM and ITCM interfaces:
•
DMA to ITCM should not occur be performed unless IRIDLE is asserted
•
Only back-to-back transfers on the DTCM can be marked as sequential. On the
ITCM idle cycles may occur before requests marked as sequential.
ITCM idle cycles may occur before requests marked as sequential.
•
Sequential write transfers will not occur on the ITCM.