Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Datenbogen

Produktcode
AT91SAM9N12-EK
Seite von 1104
967
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 44-5.  DISP Signal Timing Diagram
LCD_VSYNC
LCD_DISP
LCD_PCLK
LCD_HSYNC 
VSPDLYE = 0 VSPHO = 0 DISPPOL = 0 DISPDLY = 0
LCD_VSYNC
LCD_DISP
LCD_PCLK
LCD_HSYNC 
VSPDLYE = 0 VSPHO = 0 DISPPOL = 0 DISPDLY = 0
lcd display off
lcd display on
lcd display on
lcd display off
LCD_VSYNC
LCD_DISP
LCD_PCLK
LCD_HSYNC 
VSPDLYE = 0 VSPHO = 0 DISPPOL = 0 DISPDLY = 1
LCD_VSYNC
LCD_DISP
LCD_PCLK
LCD_HSYNC 
VSPDLYE = 0 VSPHO = 0 DISPPOL = 0 DISPDLY = 1
lcd display off
lcd display on
lcd display on
lcd display off