Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Datenbogen

 1049

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

The LCD Controller consists of two main blocks (

troller core (LCDC core). The DMA controller reads the display data from an external memory through a AHB
master interface. The LCD controller core formats the display data. The LCD controller core continuously pumps
the pixel data into the LCD module via the LCD data bus (LCDD[23:0]); this bus is timed by the LCDDOTCK, LCD-
DEN, LCDHSYNC, and LCDVSYNC signals.

The configuration block is a set of programmable registers that are used to configure the DMA controller operation.
These registers are written via the AHB slave interface. Only word access is allowed.

For details on the configuration registers, see 

.

This block generates the AHB transactions. It generates undefined-length incrementing bursts as well as 4-, 8- or
16-beat incrementing bursts. The size of the transfer can be configured in the BRSTLN field of the DMAFRMCFG
register. For details on this register, see 

This block stores the base address and the number of words transferred for this channel (frame in single scan
mode and Upper Panel in dual scan mode) since the beginning of the frame. It also generates the end of frame
signal.

It has two pointers, the base address and the number of words to transfer. When the module receives a new_frame
signal, it reloads the number of words to transfer pointer with the size of the frame/panel. When the module
receives the new_frame signal, it also reloads the base address with the base address programmed by the host. 

The size of the frame/panel can be programmed in the FRMSIZE field of the DMAFRMCFG Register. This size is
calculated as follows:

where:

X_size = ((LINESIZE+1)*Bpp+PIXELOFF)/32

Y_size = (LINEVAL+1)

• LINESIZE

is the horizontal size of the display in pixels, minus 1, as programmed in the LINESIZE field of the 

LCDFRMCFG register of the LCD Controller.

• Bpp

is the number of bits per pixel configured.

• PIXELOFF

is the pixel offset for 2D addressing, as programmed in the DMA2DCFG register. Applicable only if 

2D addressing is being used.

• LINEVAL

is the vertical size of the display in pixels, minus 1, as programmed in the LINEVAL field of the 

LCDFRMCFG register of the LCD Controller.

Note:

X_size is calculated as an up-rounding of a division by 32. (This can also be done adding 31 to the dividend before 
using an integer division by 32). When using the 2D-addressing mode (see 

), it 

is important to note that the above calculation must be executed and the FRMSIZE field programmed with every move-
ment of the displaying window, since a change in the PIXELOFF field can change the resulting FRMSIZE value.

Frame_size

X_size*Y_size

32

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