Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Datenbogen

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AT91SAM9M10-G45-EK
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
25.5.4
Slow  Clock  Configuration  Register
Name:
SCKCR
Address:
0xFFFFFD50
Access:
Read/Write
• RCEN:  Internal  RC
0: RC is disabled
1: RC is enabled
• OSC32EN:  32768  Hz  oscillator
0: 32768Hz oscillator is disabled
1: 32768Hz oscillator is enabled
• OSC32BYP:  32768Hz  oscillator  bypass
0: 32768Hz oscillator is not bypassed
1: 32768Hz oscillator is bypassed, accept an external slow clock on XIN32
• OSCSEL:  Slow  clock  selector
0: Slow clock is internal RC
1: Slow clock is 32768 Hz oscillator
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OSCSEL
OSC32BYP
OSC32EN
RCEN