Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Datenbogen
Produktcode
AT91SAM9M10-G45-EK
497
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
Moreover, if INACK is set, the erroneous received character is stored in the Receive Holding Register, as if no
error occurred. However, the RXRDY bit does not raise.
error occurred. However, the RXRDY bit does not raise.
31.7.4.5
Transmit Character Repetition
When the USART is transmitting a character and gets a NACK, it can automatically repeat the character before
moving on to the next one. Repetition is enabled by writing the MAX_ITERATION field in the Mode Register
(US_MR) at a value higher than 0. Each character can be transmitted up to eight times; the first transmission plus
seven repetitions.
moving on to the next one. Repetition is enabled by writing the MAX_ITERATION field in the Mode Register
(US_MR) at a value higher than 0. Each character can be transmitted up to eight times; the first transmission plus
seven repetitions.
If MAX_ITERATION does not equal zero, the USART repeats the character as many times as the value loaded in
MAX_ITERATION.
MAX_ITERATION.
When the USART repetition number reaches MAX_ITERATION, the ITERATION bit is set in the Channel Status
Register (US_CSR). If the repetition of the character is acknowledged by the receiver, the repetitions are stopped
and the iteration counter is cleared.
Register (US_CSR). If the repetition of the character is acknowledged by the receiver, the repetitions are stopped
and the iteration counter is cleared.
The ITERATION bit in US_CSR can be cleared by writing the Control Register with the RSIT bit at 1.
31.7.4.6
Disable Successive Receive NACK
The receiver can limit the number of successive NACKs sent back to the remote transmitter. This is programmed
by setting the bit DSNACK in the Mode Register (US_MR). The maximum number of NACK transmitted is pro-
grammed in the MAX_ITERATION field. As soon as MAX_ITERATION is reached, the character is considered as
correct, an acknowledge is sent on the line and the ITERATION bit in the Channel Status Register is set.
by setting the bit DSNACK in the Mode Register (US_MR). The maximum number of NACK transmitted is pro-
grammed in the MAX_ITERATION field. As soon as MAX_ITERATION is reached, the character is considered as
correct, an acknowledge is sent on the line and the ITERATION bit in the Channel Status Register is set.
31.7.4.7
Protocol T = 1
When operating in ISO7816 protocol T = 1, the transmission is similar to an asynchronous format with only one
stop bit. The parity is generated when transmitting and checked when receiving. Parity error detection sets the
PARE bit in the Channel Status Register (US_CSR).
stop bit. The parity is generated when transmitting and checked when receiving. Parity error detection sets the
PARE bit in the Channel Status Register (US_CSR).
31.7.5
IrDA Mode
The USART features an IrDA mode supplying half-duplex point-to-point wireless communication. It embeds the
modulator and demodulator which allows a glueless connection to the infrared transceivers, as shown in
modulator and demodulator which allows a glueless connection to the infrared transceivers, as shown in
speeds ranging from 2.4 Kb/s to 115.2 Kb/s.
The USART IrDA mode is enabled by setting the USART_MODE field in the Mode Register (US_MR) to the value
0x8. The IrDA Filter Register (US_IF) allows configuring the demodulator filter. The USART transmitter and
receiver operate in a normal asynchronous mode and all parameters are accessible. Note that the modulator and
the demodulator are activated.
0x8. The IrDA Filter Register (US_IF) allows configuring the demodulator filter. The USART transmitter and
receiver operate in a normal asynchronous mode and all parameters are accessible. Note that the modulator and
the demodulator are activated.
Figure 31-33.
Connection to IrDA Transceivers
IrDA
Transceivers
RXD
RX
TXD
TX
USART
Demodulator
Modulator
Receiver
Transmitter