Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Datenbogen
Produktcode
AT91SAM9M10-G45-EK
516
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
Figure 31-49.
Slave Node Configuration, NACT = PUBLISH
Figure 31-50.
Slave Node Configuration, NACT = SUBSCRIBE
Figure 31-51.
Slave Node Configuration, NACT = IGNORE
31.7.8.22
LIN Frame Handling With The Peripheral DMA Controller
The USART can be used in association with the Peripheral DMA Controller (PDC) in order to transfer data directly
into/from the on- and off-chip memories without any processor intervention.
into/from the on- and off-chip memories without any processor intervention.
The PDC uses the trigger flags, TXRDY and RXRDY, to write or read into the USART. The PDC always writes in
the Transmit Holding register (US_THR) and it always reads in the Receive Holding register (US_RHR). The size of
the data written or read by the PDC in the USART is always a byte.
the Transmit Holding register (US_THR) and it always reads in the Receive Holding register (US_RHR). The size of
the data written or read by the PDC in the USART is always a byte.
Break
Synch
Protected
Identifier
Data 1
Data N
Checksum
TXRDY
Write
US_THR
Read
US_LINID
Data 1
Data 3
Data N-1
Data N
RXRDY
LINIDRX
Data 2
LINTC
TXRDY
Read
US_RHR
Read
US_LINID
RXRDY
LINIDRX
LINTC
Break
Synch
Protected
Identifier
Data 1
Data N
Checksum
Data 1
Data N-1
Data N-1
Data N
Data N-2
TXRDY
Read
US_RHR
Read
US_LINID
RXRDY
LINIDRX
LINTC
Break
Synch
Protected
Identifier
Data 1
Data N
Checksum
Data N-1