Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Datenbogen

Produktcode
AT91SAM9M10-G45-EK
Seite von 1361
 749
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
36.6.5
Receive  Buffer  Queue  Pointer  Register
Name:
EMAC_RBQP
Address:
0xFFFBC018
Access:
Read-write
This register points to the entry in the receive buffer queue (descriptor list) currently being used. It is written with the start
location of the receive buffer descriptor list. The lower order bits increment as buffers are used up and wrap to their original
values after either 1024 buffers or when the wrap bit of the entry is set. 
Reading this register returns the location of the descriptor currently being accessed. This value increments as buffers are
used. Software should not use this register for determining where to remove received frames from the queue as it con-
stantly changes as new frames are received. Software should instead work its way through the buffer descriptor queue
checking the used bits.
Receive buffer writes also comprise bursts of two words and, as with transmit buffer reads, it is recommended that bit 2 is
always written with zero to prevent a burst crossing a 1K boundary, in violation of section 3.6 of the AMBA specification.
• ADDR: 
Receive  buffer  queue  pointer  address
Written with the address of the start of the receive queue, reads as a pointer to the current buffer being used.
31
30
29
28
27
26
25
24
ADDR
23
22
21
20
19
18
17
16
ADDR
15
14
13
12
11
10
9
8
ADDR
7
6
5
4
3
2
1
0
ADDR