Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Datenbogen

Produktcode
AT91SAM9M10-G45-EK
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
42.7.1
PWM  Mode  Register
Name:
 PWM_MR
Address:
0xFFFB8000
Access:
 Read/Write
• DIVA,  DIVB:  CLKA,  CLKB  Divide  Factor
• PREA,  PREB 
31
30
29
28
27
26
25
24
PREB
23
22
21
20
19
18
17
16
DIVB
15
14
13
12
11
10
9
8
PREA
7
6
5
4
3
2
1
0
DIVA
DIVA,  DIVB
CLKA,  CLKB
0
CLKA, CLKB clock is turned off
1
CLKA, CLKB clock is clock selected by PREA, PREB
2-255
CLKA, CLKB clock is clock selected by PREA, PREB divided by DIVA, DIVB factor.
PREA,  PREB
Divider  Input  Clock
0
0
0
0
MCK.
0
0
0
1
MCK/2 
0
0
1
0
MCK/4 
0
0
1
1
MCK/8 
0
1
0
0
MCK/16
0
1
0
1
MCK/32
0
1
1
0
MCK/64
0
1
1
1
MCK/128
1
0
0
0
MCK/256
1
0
0
1
MCK/512
1
0
1
0
MCK/1024
Other
Reserved