Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Datenbogen
Produktcode
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
994
• CES: Counter Event Selection
The bit CES defines when the channel counter event occurs when the period is center aligned (flag CHIDx in
).
CALG = 0 (Left Alignment):
0/1: The channel counter event occurs at the end of the PWM period.
CALG = 1 (Center Alignment):
0: The channel counter event occurs at the end of the PWM period.
1: The channel counter event occurs at the end of the PWM period and at half the PWM period.
1: The channel counter event occurs at the end of the PWM period and at half the PWM period.
• DTE: Dead-Time Generator Enable
0: The dead-time generator is disabled.
1: The dead-time generator is enabled.
1: The dead-time generator is enabled.
• DTHI: Dead-Time PWMHx Output Inverted
0: The dead-time PWMHx output is not inverted.
1: The dead-time PWMHx output is inverted.
1: The dead-time PWMHx output is inverted.
• DTLI: Dead-Time PWMLx Output Inverted
0: The dead-time PWMLx output is not inverted.
1: The dead-time PWMLx output is inverted.
1: The dead-time PWMLx output is inverted.