Mikroelektronika MikroE Development Kits MIKROE-1206 Datenbogen

Produktcode
MIKROE-1206
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© 2009-2011 Microchip Technology Inc.
DS61156G-page 125
PIC32MX5XX/6XX/7XX
8.0
OSCILLATOR 
CONFIGURATION
The PIC32MX5XX/6XX/7XX oscillator system has the
following modules and features:
• A total of four external and internal oscillator 
options as clock sources
• On-Chip PLL with user-selectable input divider, 
multiplier and output divider to boost operating 
frequency on select internal and external 
oscillator sources
• On-Chip user-selectable divisor postscaler on 
select oscillator sources
• Software-controllable switching between 
various clock sources
• A Fail-Safe Clock Monitor (FSCM) that detects 
clock failure and permits safe application recovery 
or shutdown
• Dedicated On-Chip PLL for USB peripheral
shows the Oscillator module block diagram.
FIGURE 8-1:
PIC32MX5XX/6XX/7XX FAMILY OSCILLATOR BLOCK DIAGRAM 
Note 1: This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 6. “Oscillator”
(DS61112) in the “PIC32 Family
Reference Manual”
, which is available
from the Microchip web site
(
www.microchip.com/PIC32
).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
 in
this data sheet for device-specific register
and bit information.
Timer1, RTCC
Clock Control Logic
Fail-Safe
Clock
Monitor
FSCM INT
FSCM Event
COSC<2:0>
NOSC<2:0>
OSWEN
FSCMEN<1:0>
PLL
Secondary Oscillator (S
OSC
)
SOSCEN and FSOSCEN
SOSCO
SOSCI
Primary Oscillator
XTPLL, HSPLL,
XT, HS, EC
CPU and Select Peripherals
Peripherals
FRCDIV<2:0>
WDT, PWRT
8 MHz typical
FRC
31.25 kHz typical
FRC
Oscillator
LPRC
Oscillator
S
OSC
LPRC
FRCDIV
ECPLL, FRCPLL
TUN<5:0>
div 16
Postscaler
FPLLIDIV<2:0>
PBDIV<1:0>
FRC/16
Postscaler
PLL Multiplier
COSC<2:0>
F
IN
div x
div y
PLL Output Divider
PLLODIV<2:0>
PLL Input Divider
div x
32.768 kHz
PLLMULT<2:0>
PBCLK
UF
IN
 
= 4 MHz
PLL x24
USB Clock (48 MHz)
div 2
UPLLEN
UFRCEN
div x
UPLLIDIV<2:0>
UF
IN
4 MHz 
≤ F
IN
 
≤ 5 MHz
C1
(3)
C2
(3)
XTAL
R
S(1)
Enable
Notes: 1.
A series resistor, R
S
, may be required for AT strip cut crystals.
2.
The internal feedback resistor, R
F
, is typically in the range of 2 to 10 M
Ω.
3.
Refer to Section 6. “Oscillator ” (DS61112) in the “PIC32 Family 
Reference Manual
” for help in determining the best oscillator components.
4.
The PBCLK out is available on the OSC2 pin in certain clock modes.
OSC2
(4)
OSC1
R
F(2)
To Internal
Logic
USB PLL
(P
OSC
)
div 2
ADC
SYSCLK