Mikroelektronika MikroE Development Kits MIKROE-997 Datenbogen
Produktcode
MIKROE-997
PIC18F87J50 FAMILY
DS39775C-page 420
© 2009 Microchip Technology Inc.
FIGURE 28-1:
PIC18F87J50 FAMILY V
DD
FREQUENCY GRAPH (INDUSTRIAL)
FIGURE 28-2:
PIC18F87J50 FAMILY V
DDCORE
FREQUENCY GRAPH (INDUSTRIAL)
(1)
0
Note 1:
When the USB module is enabled, V
USB
and V
DD
should be connected together and provided
3.0V-3.6V while V
DDCORE
must be
≥ 2.45V. When the core regulator is enabled and V
DD
is
≥ 3.0V, it
will always regulate to
≥ 2.45V. When the USB module is not enabled, V
USB
and V
DD
should still be
connected together, but the wider limits shaded in gray apply.
Frequency
Vo
lt
ag
e
(
V
DD
)
4.0V
2.0V
48 MHz
3.5V
3.0V
2.5V
3.6V
8 MHz
PIC18F87J50 Family
2.35V
(Note 1)
Frequency
Vo
lt
ag
e
(
V
D
DCO
RE
)
3.00V
2.00V
48 MHz
2.75V
2.50V
2.25V
2.75V
8 MHz
2.35V
Note 1: V
DD
and V
DDCORE
must be maintained so that V
DDCORE
≤ V
DD
.
2: When the USB module is enabled, V
USB
and V
DD
should be connected together and provided
3.0V-3.6V while V
DDCORE
must be
≥ 2.45V. When the core regulator is enabled and V
DD
is
≥ 3.0V,
it will always regulate to
≥ 2.45V. When the USB module is not enabled, V
USB
and V
DD
should still
be connected together, but the wider limits shaded in gray apply.
0
2.45V
(2)
PIC18F87J50 Family