Intel 1.00 GHz BX80530F1000256 Datenbogen

Produktcode
BX80530F1000256
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Datasheet
Intel
®
 Celeron
®
 Processor up to 1.10 GHz
3.3.2
Ringback Specification
Ringback refers to the amount of reflection seen after a signal has switched. The ringback 
specification is the voltage that the signal rings back to after achieving its maximum absolute 
value
. (See 
 for an illustration of ringback.) Excessive ringback can cause false signal 
detection or extend the propagation delay. The ringback specification applies to the input pin of 
each receiving agent. Violations of the signal ringback specification are not allowed under any 
circumstances for non-AGTL+ signals.
Ringback can be simulated with or without the input protection diodes that can be added to the 
input buffer model. However, signals that reach the clamping voltage should be evaluated further. 
See 
 for the signal ringback specifications for non-AGTL+ signals for simulations at the 
 for guidelines on measuring ringback at the edge fingers. 
 
lists the ringback specifications for the FC-PGA/FC-PGA2 packages.
NOTE:
1. Unless otherwise noted, all specifications in this table apply to all Celeron processor frequencies.
NOTE:
1. Unless otherwise noted, all specifications in this table apply to all Celeron processor frequencies.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all FC-PGA/FC-PGA2 processor frequencies 
and cache sizes.
Table 34.  Signal Ringback Specifications for Non-AGTL+ Signal Simulation at the Processor 
Core (S.E.P. and PPGA Packages)
Input Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Notes
Non-AGTL+ Signals
 
1
1.7
V
Non-AGTL+ Signals
 
0
0.7
V
Table 35.  Signal Ringback Guidelines for Non-AGTL+ Signal Edge Finger Measurement 
(S.E.P. Package)
Input Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Notes
Non-AGTL+ Signals
 
1
2.0
V
Non-AGTL+ Signals
 
0
0.7
V
Table 36.  Signal Ringback Specifications for Non-AGTL+ Signal Simulation at the Processor 
Pins (FC-PGA/FC-PGA2 Packages)
Input Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Non-AGTL+ Signals
 
1
V
REF
 + 0.200
V
PWRGOOD 0 
 
1
2.0
V
Non-AGTL+ Signals
 
0
V
REF
 – 0.200
V