Intel III Xeon 900 MHz 80526KY9002M Datenbogen

Produktcode
80526KY9002M
Seite von 103
PENTIUM® III XEON™ PROCESSOR AT 600 MHz to 1  GHz with 256KB L2 Cache
APPENDIX
96
OCVR_ O K
Vout  (OCVR)
Vin  (OCVR)
90% of Vin 
Nominal
2.8/5/12V
VCC_CPU
RESET#
V R M _ P W R G D
CPU_PWR_GD
1 mS
1 3 mS
0.5 mS (max)
Figure 41.  PWRGD Relationship at Power-On
NOTES:
1. 
VCC_CORE must be applied to the OCVR input before OCVR_OK can become valid (even though it could be pulled high if the
VCC_SMB supply is turned on, see figure 41.
2. 
The OCVR_OK signal is not guaranteed to be valid until 0.5 mS (max) after Vin to the OCVR reaches 90% of it’s nominal value.
3. 
Vin is the input to the OCVR (VCC_CORE).
4. 
Vout is the output from the OCVR (VCC_CPU).