Intel C2550 FH8065401488912 Datenbogen

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

360

Order Number: 330061-002US

Besides pins that are also hard strap pins, there are other SoC pins that require special 

treatment by the platform board design.

Three of the multi-function signal pins have more than one normal, native usage. Each 

also has the option of being configured as a Customer General Purpose I/O (GPIO). 

Usually this is done by the BIOS.

 lists these multi-function pins. Each native signal pin listed in the table has 

an internal 20-kΩ pull-up resistor to 3.3V.

Customer GPIO signal-pin details are in 

None of the three signals are hard pin-strap pins.

To use a pin function that is labeled as Pin Function = 2, its 32-bit Pad Configuration 0 

(PCONF0) register in memory space must be properly set by the software, usually the 

BIOS. The 3-bit Functional Pin Multiplexer (FUN_PIN_MUX) field, bits [2:0] of the pins 

PCONF0 register must be set to 010 binary. The three 32-bit registers are shown in 

To correctly set the PCONF0, the software must first read the 32-bit PCONF0 register, 

alter only bits [2:0] to 010 binary, and write the altered results to the original PCONF0 

register. The original PCONF0 bits [31:3] must not be disturbed.

AN65

3.3V Core SMB_DATA2

I/O OD

UART0_RXD

I/O

GPIOS_13

AR65

3.3V Core SMB_CLK2

I/O OD

UART0_TXD

O

GPIOS_14

AR63

3.3V Core SMB_CLK1

I/O OD

SPKR

O

GPIOS_12

AN65

UART0_RXD

CFIO_REGS_PAD_SMB_DATA2_PCONF0

0x0160

2

AR65

UART0_TXD

CFIO_REGS_PAD_SMB_CLK2_PCONF0

0x0170

2

AR63

SPKR

CFIO_REGS_PAD_SMB_CLK1_PCONF0

0x01B0

2