Intel C2550 FH8065401488912 Datenbogen
Produktcode
FH8065401488912
Volume 2—Low Pin Count (LPC) Controller—C2000 Product Family
Signal Descriptions
Intel
®
Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
500
Order Number: 330061-002US
24.1
Signal Descriptions
The signal description table has the following headings:
• Signal Name: The name of the signal/pin
• Direction: The buffer direction is either input, output, or I/O (bi-directional)
• Type: The buffer type
• Description: A brief explanation of the signal function
• Direction: The buffer direction is either input, output, or I/O (bi-directional)
• Type: The buffer type
• Description: A brief explanation of the signal function
Note:
Only 3.3V LPC devices are supported on the LPC interface.
Table 24-2. SoC LPC Interface Signals
Signal Name
Direction/
Type
Description
I/O
LPC Multiplexed Command, Address, Data:
Internal pull-ups are
provided for these signals.
The LPC_AD[3:0] signals are muxed with GPIOS[24:21] and are used by
The LPC_AD[3:0] signals are muxed with GPIOS[24:21] and are used by
O
LPC Clock [1:0] Out:
A 25-MHz PCI-like clock driven to LPC peripherals.
I/OD
LPC Clock Run:
Input to determine the status of LPC_CLK and an
open-drain output is used to request starting or speeding up LPC_CLK.
This is a sustained tri-state signal used by the central resource to request
permission to stop or slow LPC_CLK. The central resource maintains the
signal in the asserted state when LPC_CLK is running and deasserts the
signal to request permission to stop or slow LPC_CLK.
An external pull-up resistor, 20 kΩ suggested, tied to 3.3V is required.
This signal is muxed with GPIOS[28] and is used by other functions.
An external pull-up resistor, 20 kΩ suggested, tied to 3.3V is required.
This signal is muxed with GPIOS[28] and is used by other functions.
O
LPC Frame:
This signal indicates the start of an LPC cycle or an abort.
I/O
Serial Interrupt Request:
This signal implements the serial interrupt
protocol. See
for additional
information about this pin.
This signal is muxed with GPIOS[29] and is used by other functions.
This signal is muxed with GPIOS[29] and is used by other functions.
O
PMU
This active-low output signal indicates that the platform is
entering a low-power state (S5) soon. When that happens, the SoC needs
to operate from the Suspend (SUS) power well only.
This signal is used as the LPC Power Down (LPCPD#) signal sent to LPC
This signal is used as the LPC Power Down (LPCPD#) signal sent to LPC
devices that need the LPCPD# input. LPCPD# is monitored by LPC
devices with memory that needs to switch from normal refresh mode to
suspend refresh mode. It is also used by other peripherals as an
indication that they isolate their outputs that are powered by voltage
planes that are soon powered-off.
This is going to powered-off planes.
This signal is muxed with GPIO_SUS[10] and is used by other functions.
This is going to powered-off planes.
This signal is muxed with GPIO_SUS[10] and is used by other functions.