Intel E3845 FH8065301487715 Datenbogen
Produktcode
FH8065301487715
PCU – iLB – Real Time Clock (RTC)
Intel
®
Atom™ Processor E3800 Product Family
4544
Datasheet
36.2
Features
The Real Time Clock (RTC) module provides a battery backed-up date and time keeping
device. Three interrupt features are available: time of day alarm with once a second to
once a month range, periodic rates of 122 us to 500 ms, and end of update cycle
notification. Seconds, minutes, hours, days, day of week, month, and year are counted.
device. Three interrupt features are available: time of day alarm with once a second to
once a month range, periodic rates of 122 us to 500 ms, and end of update cycle
notification. Seconds, minutes, hours, days, day of week, month, and year are counted.
Table 325. RTC Signals
Signal Name
Direction
Plat. Power
Description
ILB_RTC_X1
I
VRTC
Crystal Input 1: This signal is connected to the 32.768
kHz crystal. If no external crystal is used, the signal can
be driven with the desired clock rate.
kHz crystal. If no external crystal is used, the signal can
be driven with the desired clock rate.
ILB_RTC_X2
I
VRTC
Crystal Input 2: This signal is connected to the 32.768
kHz crystal. If no external crystal is used, the signal
should be left floating.
kHz crystal. If no external crystal is used, the signal
should be left floating.
ILB_RTC_RST#
I
VRTC
RTC Reset: An external RC circuit creates a time delay for
the signal such that it will go high (de-assert) sometime
after the battery voltage is valid. The RC time delay should
be in the 10-20 ms range. Contact your Intel
representative for details.
When asserted, this signal resets all register bits in the
RTC well except for GEN_PMCON1.RPS.
NOTE: Unless registers are being cleared (only to be done
the signal such that it will go high (de-assert) sometime
after the battery voltage is valid. The RC time delay should
be in the 10-20 ms range. Contact your Intel
representative for details.
When asserted, this signal resets all register bits in the
RTC well except for GEN_PMCON1.RPS.
NOTE: Unless registers are being cleared (only to be done
in the G3 power state), the signal input must
always be high when all other RTC power planes
are on.
always be high when all other RTC power planes
are on.
NOTE: In the case where the RTC battery is dead or
missing on the platform, the signal should be
deasserted before the PMC_RSMRST# signal is
deasserted.
deasserted before the PMC_RSMRST# signal is
deasserted.
ILB_RTC_TEST#
I
VRTC
RTC Battery Test: An external RC circuit creates a time
delay for the signal such that it will go high (de-assert)
sometime after the battery voltage is valid. The RC time
delay should be in the 10-20 ms range. Contact your Intel
representative for details. If the battery is missing/weak,
this signal appears low (asserted) at boot just after the
suspend power rail (V3P3A) is up since it will not have
time to meet Vih when V3P3A is high. The weak/missing
battery condition is reported in the GEN_PMCON1.RPS
(RTC Power Status) register. When asserted, BIOS may
clear the RTC CMOS RAM.
NOTE: Unless CMOS is being cleared (only to be done in
delay for the signal such that it will go high (de-assert)
sometime after the battery voltage is valid. The RC time
delay should be in the 10-20 ms range. Contact your Intel
representative for details. If the battery is missing/weak,
this signal appears low (asserted) at boot just after the
suspend power rail (V3P3A) is up since it will not have
time to meet Vih when V3P3A is high. The weak/missing
battery condition is reported in the GEN_PMCON1.RPS
(RTC Power Status) register. When asserted, BIOS may
clear the RTC CMOS RAM.
NOTE: Unless CMOS is being cleared (only to be done in
the G3 power state) or the battery is low, the
signal input must always be high when all other
RTC power planes are on.
signal input must always be high when all other
RTC power planes are on.
NOTE: This signal may also be used for debug purposes,
as part of a XDP port. Contact your Intel
representative for details.
representative for details.
ILB_RTC_EXTPAD
I
VRTC
External capacitor connection