Intel E3815 FH8065301567411 Datenbogen
Produktcode
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
567
14.10.121 MIPIC_EOT_DISABLE_REGISTER—Offset B85Ch
mipi C EOT disable register
Access Method
Default: 00000000h
Bit
Range
Default &
Access
Field Name (ID): Description
31:5
0b
RW
RESERVED:
Reserved.
4
0b
RW
RANDOM_DPI_DISPLAY_RESOLUTION_DEFEATURE:
Set by the processor to
support random DPI display resolution
0 - random DPI display resolution support disabled.
1 - random DPI display resolution support enabled.
3
0b
RW
MIPIC_DISABLE_VIDEO_BTA:
Set by the processor to inform the DSI controller to
disable the BTA sent at the last blanking line of VFP.
By default, this bit is set to 0.
0- BTA sending at the last blanking line of VFP is enabled.
1 - BTA sentding at teh last blanking line of VFP is disabeld.
2
0b
RW
IP_TG_CONFIG:
Set by the processor to inform that the DSI controller should
discontinue the DPI transfer after the last line of the VFP after ip_tg_enable deassertion.
By default, this bit is set to 0.
0 - After ip_tg_enable deassertion, DSI Tx controller stops the DPI transfer immediately
after the current packet is transmitted.
1 - After ip_tg_enable deassertion, DSI Tx controller discontinues the DPI transfer after
the last line of the VFP
1:0
0b
RW
VIDEO_MODE_FMT:
Sets the Video mode format (packet sequence) to be supported
in DSI. In Non Burst Mode, in addition to programming this register the horizontal active
area count register value should also be programmed equal to RGB word count value In
Burst Mode, in addition to programming this register the horizontal active area count
register value should also be programmed greater than the RGB word count value,
leaving more time during a scan line for LP mode (saving power) or for multiplexing
other transmissions onto the DSI link.
00 Reserved
01 - Non Burst Mode with Sync Pulse
10 - Non Burst Mode with Sync events
11 - Burst Mode
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h